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3f021fa672
This patch marks the induction increment of the main induction variable of the vector loop as NUW when not folding the tail. If the tail is not folded, we know that End - Start >= Step (either statically or through the minimum iteration checks). We also know that both Start % Step == 0 and End % Step == 0. We exit the vector loop if %IV + %Step == %End. Hence we must exit the loop before %IV + %Step unsigned overflows and we can mark the induction increment as NUW. This should make SCEV return more precise bounds for the created vector loops, used by later optimizations, like late unrolling. At the moment quite a few tests still need to be updated, but before doing so I'd like to get initial feedback to make sure I am not missing anything. Note that this could probably be further improved by using information from the original IV. Attempt of modeling of the assumption in Alive2: https://alive2.llvm.org/ce/z/H_DL_g Part of a set of fixes required for PR50412. Reviewed By: mkazantsev Differential Revision: https://reviews.llvm.org/D103255
83 lines
4.7 KiB
LLVM
83 lines
4.7 KiB
LLVM
; RUN: opt -loop-vectorize -force-vector-width=4 -enable-vplan-native-path -S %s | FileCheck %s
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; Vectorize explict marked outer loop using vplan native path. Inner loop
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; contains simple double add reduction. IR is compiled and modified by hand
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; from following C code:
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; void inner_loop_reduction(const double* restrict in_a, const double* restrict in_b, double* restrict out)
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; {
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; #pragma clang loop vectorize(enable)
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; for (int i = 0; i < 1000; ++i) {
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; double a = in_a[i];
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; double b = in_b[i];
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; for (int j = 0; j < 10000; ++j) {
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; a = a + b;
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; }
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; out[i] = a;
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; }
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; }
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define void @inner_loop_reduction(double* noalias nocapture readonly %a.in, double* noalias nocapture readonly %b.in, double* noalias nocapture %c.out) {
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; CHECK-LABEL: @inner_loop_reduction(
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; CHECK: vector.body:
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; CHECK-NEXT: %[[FOR1_INDEX:.*]] = phi i64 [ 0, %[[LABEL_PR:.*]] ], [ %{{.*}}, %[[LABEL_FOR1_LATCH:.*]] ]
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; CHECK: %[[VEC_INDEX:.*]] = phi <4 x i64> [ <i64 0, i64 1, i64 2, i64 3>, %[[LABEL_PR]] ], [ %{{.*}}, %[[LABEL_FOR1_LATCH]] ]
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; CHECK-NEXT: %[[A_PTR:.*]] = getelementptr inbounds double, double* %a.in, <4 x i64> %[[VEC_INDEX]]
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; CHECK-NEXT: %[[MASKED_GATHER1:.*]] = call <4 x double> @llvm.masked.gather.v4f64.v4p0f64(<4 x double*> %[[A_PTR]], i32 8, <4 x i1> <i1 true, i1 true, i1 true, i1 true>, <4 x double> undef)
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; CHECK-NEXT: %[[B_PTR:.*]] = getelementptr inbounds double, double* %b.in, <4 x i64> %[[VEC_INDEX]]
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; CHECK-NEXT: %[[MASKED_GATHER2:.*]] = call <4 x double> @llvm.masked.gather.v4f64.v4p0f64(<4 x double*> %[[B_PTR]], i32 8, <4 x i1> <i1 true, i1 true, i1 true, i1 true>, <4 x double> undef)
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; CHECK-NEXT: br label %[[FOR2_HEADER:.*]]
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; CHECK: [[FOR2_HEADER]]:
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; CHECK-NEXT: %[[FOR2_INDEX:.*]] = phi <4 x i32> [ zeroinitializer, %vector.body ], [ %[[FOR2_INDEX_NEXT:.*]], %[[FOR2_HEADER]] ]
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; CHECK-NEXT: %[[REDUCTION:.*]] = phi <4 x double> [ %[[MASKED_GATHER1]], %vector.body ], [ %[[REDUCTION_NEXT:.*]], %[[FOR2_HEADER]] ]
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; CHECK-NEXT: %[[REDUCTION_NEXT]] = fadd <4 x double> %[[MASKED_GATHER2]], %[[REDUCTION]]
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; CHECK-NEXT: %[[FOR2_INDEX_NEXT]] = add nuw nsw <4 x i32> %[[FOR2_INDEX]], <i32 1, i32 1, i32 1, i32 1>
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; CHECK-NEXT: %[[VEC_PTR:.*]] = icmp eq <4 x i32> %[[FOR2_INDEX_NEXT]], <i32 10000, i32 10000, i32 10000, i32 10000>
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; CHECK-NEXT: %[[EXIT_COND:.*]] = extractelement <4 x i1> %[[VEC_PTR]], i32 0
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; CHECK-NEXT: br i1 %[[EXIT_COND]], label %[[FOR1_LATCH:.*]], label %{{.*}}
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; CHECK: [[FOR1_LATCH]]:
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; CHECK-NEXT: %[[REDUCTION:.*]] = phi <4 x double> [ %[[REDUCTION_NEXT]], %[[FOR2_HEADER]] ]
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; CHECK-NEXT: %[[C_PTR:.*]] = getelementptr inbounds double, double* %c.out, <4 x i64> %[[VEC_INDEX]]
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; CHECK-NEXT: call void @llvm.masked.scatter.v4f64.v4p0f64(<4 x double> %[[REDUCTION]], <4 x double*> %[[C_PTR]], i32 8, <4 x i1> <i1 true, i1 true, i1 true, i1 true>)
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; CHECK-NEXT: %[[VEC_INDEX_NEXT:.*]] = add nuw nsw <4 x i64> %[[VEC_INDEX]], <i64 1, i64 1, i64 1, i64 1>
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; CHECK-NEXT: %[[VEC_PTR:.*]] = icmp eq <4 x i64> %[[VEC_INDEX_NEXT]], <i64 1000, i64 1000, i64 1000, i64 1000>
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; CHECK-NEXT: %{{.*}} = extractelement <4 x i1> %[[VEC_PTR]], i32 0
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; CHECK-NEXT: %[[FOR1_INDEX_NEXT:.*]] = add nuw i64 %[[FOR1_INDEX]], 4
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; CHECK-NEXT: %{{.*}} = add <4 x i64> %[[VEC_INDEX]], <i64 4, i64 4, i64 4, i64 4>
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; CHECK-NEXT: %[[EXIT_COND:.*]] = icmp eq i64 %[[FOR1_INDEX_NEXT]], 1000
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; CHECK-NEXT: br i1 %[[EXIT_COND]], label %{{.*}}, label %vector.body
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entry:
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br label %for1.header
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for1.header: ; preds = %entry
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%indvar1 = phi i64 [ 0, %entry ], [ %indvar11, %for1.latch ]
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%a.ptr = getelementptr inbounds double, double* %a.in, i64 %indvar1
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%a = load double, double* %a.ptr, align 8
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%b.ptr = getelementptr inbounds double, double* %b.in, i64 %indvar1
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%b = load double, double* %b.ptr, align 8
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br label %for2.header
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for2.header: ; preds = %for1.header, %for2.header
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%indvar2 = phi i32 [ 0, %for1.header ], [ %indvar21, %for2.header ]
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%a.reduction = phi double [ %a, %for1.header ], [ %a.reduction1, %for2.header ]
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%a.reduction1 = fadd double %b, %a.reduction
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%indvar21 = add nuw nsw i32 %indvar2, 1
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%for2.cond = icmp eq i32 %indvar21, 10000
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br i1 %for2.cond, label %for1.latch, label %for2.header
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for1.latch: ; preds = %for2.header
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%c.ptr = getelementptr inbounds double, double* %c.out, i64 %indvar1
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store double %a.reduction1, double* %c.ptr, align 8
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%indvar11 = add nuw nsw i64 %indvar1, 1
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%for1.cond = icmp eq i64 %indvar11, 1000
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br i1 %for1.cond, label %exit, label %for1.header, !llvm.loop !0
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exit: ; preds = %for1.latch
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ret void
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}
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!0 = distinct !{!0, !1}
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!1 = !{!"llvm.loop.vectorize.enable", i1 true}
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