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4e2f16caa6
The second register is the index register and should only be %si or %di if used with a base register. And in that case the base register should be %bp or %bx. This makes us compatible with gas. We do still need to support both orders with Intel syntax which uses [bp+si] and [si+bp] llvm-svn: 335384
7 lines
178 B
ArmAsm
7 lines
178 B
ArmAsm
// RUN: llvm-mc -triple i686-unknown-unknown -x86-asm-syntax=intel %s | FileCheck %s
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// CHECK: leaw (%bp,%si), %ax
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lea ax, [bp+si]
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// CHECK: leaw (%bp,%si), %ax
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lea ax, [si+bp]
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