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https://github.com/RPCS3/llvm-mirror.git
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bcaaea3448
Only the dispatch.ptr intrinsic is supposed to be used now to get the workgroup size, and the read.local.size intrinsics do not work correctly. llvm-svn: 259296
171 lines
6.4 KiB
LLVM
171 lines
6.4 KiB
LLVM
; RUN: opt -mtriple=amdgcn-unknown-amdhsa -S -amdgpu-annotate-kernel-features < %s | FileCheck -check-prefix=HSA %s
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declare i32 @llvm.amdgcn.workgroup.id.x() #0
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declare i32 @llvm.amdgcn.workgroup.id.y() #0
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declare i32 @llvm.amdgcn.workgroup.id.z() #0
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declare i32 @llvm.amdgcn.workitem.id.x() #0
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declare i32 @llvm.amdgcn.workitem.id.y() #0
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declare i32 @llvm.amdgcn.workitem.id.z() #0
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declare i8 addrspace(2)* @llvm.amdgcn.dispatch.ptr() #0
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; HSA: define void @use_tgid_x(i32 addrspace(1)* %ptr) #1 {
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define void @use_tgid_x(i32 addrspace(1)* %ptr) #1 {
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%val = call i32 @llvm.amdgcn.workgroup.id.x()
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store i32 %val, i32 addrspace(1)* %ptr
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ret void
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}
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; HSA: define void @use_tgid_y(i32 addrspace(1)* %ptr) #2 {
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define void @use_tgid_y(i32 addrspace(1)* %ptr) #1 {
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%val = call i32 @llvm.amdgcn.workgroup.id.y()
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store i32 %val, i32 addrspace(1)* %ptr
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ret void
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}
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; HSA: define void @multi_use_tgid_y(i32 addrspace(1)* %ptr) #2 {
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define void @multi_use_tgid_y(i32 addrspace(1)* %ptr) #1 {
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%val0 = call i32 @llvm.amdgcn.workgroup.id.y()
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store volatile i32 %val0, i32 addrspace(1)* %ptr
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%val1 = call i32 @llvm.amdgcn.workgroup.id.y()
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store volatile i32 %val1, i32 addrspace(1)* %ptr
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ret void
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}
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; HSA: define void @use_tgid_x_y(i32 addrspace(1)* %ptr) #2 {
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define void @use_tgid_x_y(i32 addrspace(1)* %ptr) #1 {
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%val0 = call i32 @llvm.amdgcn.workgroup.id.x()
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%val1 = call i32 @llvm.amdgcn.workgroup.id.y()
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store volatile i32 %val0, i32 addrspace(1)* %ptr
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store volatile i32 %val1, i32 addrspace(1)* %ptr
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ret void
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}
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; HSA: define void @use_tgid_z(i32 addrspace(1)* %ptr) #3 {
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define void @use_tgid_z(i32 addrspace(1)* %ptr) #1 {
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%val = call i32 @llvm.amdgcn.workgroup.id.z()
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store i32 %val, i32 addrspace(1)* %ptr
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ret void
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}
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; HSA: define void @use_tgid_x_z(i32 addrspace(1)* %ptr) #3 {
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define void @use_tgid_x_z(i32 addrspace(1)* %ptr) #1 {
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%val0 = call i32 @llvm.amdgcn.workgroup.id.x()
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%val1 = call i32 @llvm.amdgcn.workgroup.id.z()
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store volatile i32 %val0, i32 addrspace(1)* %ptr
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store volatile i32 %val1, i32 addrspace(1)* %ptr
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ret void
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}
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; HSA: define void @use_tgid_y_z(i32 addrspace(1)* %ptr) #4 {
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define void @use_tgid_y_z(i32 addrspace(1)* %ptr) #1 {
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%val0 = call i32 @llvm.amdgcn.workgroup.id.y()
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%val1 = call i32 @llvm.amdgcn.workgroup.id.z()
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store volatile i32 %val0, i32 addrspace(1)* %ptr
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store volatile i32 %val1, i32 addrspace(1)* %ptr
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ret void
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}
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; HSA: define void @use_tgid_x_y_z(i32 addrspace(1)* %ptr) #4 {
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define void @use_tgid_x_y_z(i32 addrspace(1)* %ptr) #1 {
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%val0 = call i32 @llvm.amdgcn.workgroup.id.x()
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%val1 = call i32 @llvm.amdgcn.workgroup.id.y()
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%val2 = call i32 @llvm.amdgcn.workgroup.id.z()
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store volatile i32 %val0, i32 addrspace(1)* %ptr
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store volatile i32 %val1, i32 addrspace(1)* %ptr
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store volatile i32 %val2, i32 addrspace(1)* %ptr
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ret void
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}
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; HSA: define void @use_tidig_x(i32 addrspace(1)* %ptr) #1 {
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define void @use_tidig_x(i32 addrspace(1)* %ptr) #1 {
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%val = call i32 @llvm.amdgcn.workitem.id.x()
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store i32 %val, i32 addrspace(1)* %ptr
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ret void
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}
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; HSA: define void @use_tidig_y(i32 addrspace(1)* %ptr) #5 {
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define void @use_tidig_y(i32 addrspace(1)* %ptr) #1 {
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%val = call i32 @llvm.amdgcn.workitem.id.y()
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store i32 %val, i32 addrspace(1)* %ptr
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ret void
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}
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; HSA: define void @use_tidig_z(i32 addrspace(1)* %ptr) #6 {
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define void @use_tidig_z(i32 addrspace(1)* %ptr) #1 {
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%val = call i32 @llvm.amdgcn.workitem.id.z()
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store i32 %val, i32 addrspace(1)* %ptr
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ret void
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}
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; HSA: define void @use_tidig_x_tgid_x(i32 addrspace(1)* %ptr) #1 {
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define void @use_tidig_x_tgid_x(i32 addrspace(1)* %ptr) #1 {
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%val0 = call i32 @llvm.amdgcn.workitem.id.x()
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%val1 = call i32 @llvm.amdgcn.workgroup.id.x()
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store volatile i32 %val0, i32 addrspace(1)* %ptr
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store volatile i32 %val1, i32 addrspace(1)* %ptr
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ret void
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}
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; HSA: define void @use_tidig_y_tgid_y(i32 addrspace(1)* %ptr) #7 {
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define void @use_tidig_y_tgid_y(i32 addrspace(1)* %ptr) #1 {
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%val0 = call i32 @llvm.amdgcn.workitem.id.y()
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%val1 = call i32 @llvm.amdgcn.workgroup.id.y()
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store volatile i32 %val0, i32 addrspace(1)* %ptr
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store volatile i32 %val1, i32 addrspace(1)* %ptr
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ret void
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}
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; HSA: define void @use_tidig_x_y_z(i32 addrspace(1)* %ptr) #8 {
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define void @use_tidig_x_y_z(i32 addrspace(1)* %ptr) #1 {
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%val0 = call i32 @llvm.amdgcn.workitem.id.x()
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%val1 = call i32 @llvm.amdgcn.workitem.id.y()
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%val2 = call i32 @llvm.amdgcn.workitem.id.z()
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store volatile i32 %val0, i32 addrspace(1)* %ptr
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store volatile i32 %val1, i32 addrspace(1)* %ptr
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store volatile i32 %val2, i32 addrspace(1)* %ptr
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ret void
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}
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; HSA: define void @use_all_workitems(i32 addrspace(1)* %ptr) #9 {
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define void @use_all_workitems(i32 addrspace(1)* %ptr) #1 {
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%val0 = call i32 @llvm.amdgcn.workitem.id.x()
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%val1 = call i32 @llvm.amdgcn.workitem.id.y()
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%val2 = call i32 @llvm.amdgcn.workitem.id.z()
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%val3 = call i32 @llvm.amdgcn.workgroup.id.x()
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%val4 = call i32 @llvm.amdgcn.workgroup.id.y()
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%val5 = call i32 @llvm.amdgcn.workgroup.id.z()
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store volatile i32 %val0, i32 addrspace(1)* %ptr
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store volatile i32 %val1, i32 addrspace(1)* %ptr
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store volatile i32 %val2, i32 addrspace(1)* %ptr
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store volatile i32 %val3, i32 addrspace(1)* %ptr
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store volatile i32 %val4, i32 addrspace(1)* %ptr
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store volatile i32 %val5, i32 addrspace(1)* %ptr
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ret void
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}
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; HSA: define void @use_dispatch_ptr(i32 addrspace(1)* %ptr) #10 {
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define void @use_dispatch_ptr(i32 addrspace(1)* %ptr) #1 {
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%dispatch.ptr = call i8 addrspace(2)* @llvm.amdgcn.dispatch.ptr()
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%bc = bitcast i8 addrspace(2)* %dispatch.ptr to i32 addrspace(2)*
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%val = load i32, i32 addrspace(2)* %bc
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store i32 %val, i32 addrspace(1)* %ptr
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ret void
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}
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attributes #0 = { nounwind readnone }
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attributes #1 = { nounwind }
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; HSA: attributes #0 = { nounwind readnone }
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; HSA: attributes #1 = { nounwind }
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; HSA: attributes #2 = { nounwind "amdgpu-work-group-id-y" }
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; HSA: attributes #3 = { nounwind "amdgpu-work-group-id-z" }
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; HSA: attributes #4 = { nounwind "amdgpu-work-group-id-y" "amdgpu-work-group-id-z" }
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; HSA: attributes #5 = { nounwind "amdgpu-work-item-id-y" }
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; HSA: attributes #6 = { nounwind "amdgpu-work-item-id-z" }
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; HSA: attributes #7 = { nounwind "amdgpu-work-group-id-y" "amdgpu-work-item-id-y" }
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; HSA: attributes #8 = { nounwind "amdgpu-work-item-id-y" "amdgpu-work-item-id-z" }
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; HSA: attributes #9 = { nounwind "amdgpu-work-group-id-y" "amdgpu-work-group-id-z" "amdgpu-work-item-id-y" "amdgpu-work-item-id-z" }
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; HSA: attributes #10 = { nounwind "amdgpu-dispatch-ptr" }
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