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4d3738a380
llvm-mirror/lib/Target/XCore
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Jim Lin 4d3738a380 [XCore] Add instruction pattern for bitrev 
Summary:
Add support for lowering bitreverse to the bitrev instruction.
Fix https://bugs.llvm.org/show_bug.cgi?id=34628.

Reviewers: RKSimon, rtrieu, robertlytton

Reviewed By: RKSimon

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D74748
2020-02-21 09:28:49 +08:00
..
Disassembler CMake: Make most target symbols hidden by default 2020-01-14 19:46:52 -08:00
MCTargetDesc CMake: Make most target symbols hidden by default 2020-01-14 19:46:52 -08:00
TargetInfo CMake: Make most target symbols hidden by default 2020-01-14 19:46:52 -08:00
CMakeLists.txt [XCore] Move InstPrinter files to MCTargetDesc. NFC 2019-05-10 23:36:49 +00:00
LLVMBuild.txt [XCore] Move InstPrinter files to MCTargetDesc. NFC 2019-05-10 23:36:49 +00:00
README.txt
XCore.h
XCore.td
XCoreAsmPrinter.cpp [MC] De-capitalize MCStreamer::Emit{Bundle,Addrsig}* etc 2020-02-15 09:11:48 -08:00
XCoreCallingConv.td
XCoreFrameLowering.cpp ArrayRef'ize spillCalleeSavedRegisters. NFCI. 2020-02-08 12:19:23 +01:00
XCoreFrameLowering.h ArrayRef'ize spillCalleeSavedRegisters. NFCI. 2020-02-08 12:19:23 +01:00
XCoreFrameToArgsOffsetElim.cpp Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM 2019-08-15 19:22:08 +00:00
XCoreInstrFormats.td
XCoreInstrInfo.cpp [NFC] unsigned->Register in storeRegTo/loadRegFromStack 2020-02-03 14:22:16 +01:00
XCoreInstrInfo.h [NFC] unsigned->Register in storeRegTo/loadRegFromStack 2020-02-03 14:22:16 +01:00
XCoreInstrInfo.td [XCore] Add instruction pattern for bitrev 2020-02-21 09:28:49 +08:00
XCoreISelDAGToDAG.cpp [IR] Split out target specific intrinsic enums into separate headers 2019-12-11 18:02:14 -08:00
XCoreISelLowering.cpp [XCore] Add instruction pattern for bitrev 2020-02-21 09:28:49 +08:00
XCoreISelLowering.h GlobalISel: Preserve load/store metadata in IRTranslator 2020-01-16 13:49:43 -05:00
XCoreLowerThreadLocal.cpp [IR] Split out target specific intrinsic enums into separate headers 2019-12-11 18:02:14 -08:00
XCoreMachineFunctionInfo.cpp
XCoreMachineFunctionInfo.h
XCoreMCInstLower.cpp
XCoreMCInstLower.h
XCoreRegisterInfo.cpp [TargetRegisterInfo] Default trackLivenessAfterRegAlloc() to true 2020-01-19 14:20:37 -08:00
XCoreRegisterInfo.h [TargetRegisterInfo] Default trackLivenessAfterRegAlloc() to true 2020-01-19 14:20:37 -08:00
XCoreRegisterInfo.td [XCore][NFC] Remove trailing space 2020-02-18 10:32:58 +08:00
XCoreSelectionDAGInfo.cpp
XCoreSelectionDAGInfo.h
XCoreSubtarget.cpp
XCoreSubtarget.h
XCoreTargetMachine.cpp Make llvm::StringRef to std::string conversions explicit. 2020-01-28 23:25:25 +01:00
XCoreTargetMachine.h
XCoreTargetObjectFile.cpp
XCoreTargetObjectFile.h
XCoreTargetStreamer.h
XCoreTargetTransformInfo.h recommit: [LoopVectorize][PowerPC] Estimate int and float register pressure separately in loop-vectorize 2019-10-12 02:53:04 +00:00

README.txt 

To-do
-----

* Instruction encodings
* Tailcalls
* Investigate loop alignment
* Add builtins