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f0451463da
The conditional tail call logic did the wrong thing when both destinations of a conditional branch were the same: BB#1: derived from LLVM BB %entry Live Ins: %EFLAGS Predecessors according to CFG: BB#0 JE_1 <BB#5>, %EFLAGS<imp-use,kill> JMP_1 <BB#5> BB#5: derived from LLVM BB %sw.epilog Predecessors according to CFG: BB#1 TCRETURNdi64 <ga:@mergeable_conditional_tailcall>, 0, ... We would fold the JE_1 to a TCRETURNdi64cc, and then remove our BB#5 successor. Then BB#5 would be deleted as it had no predecessors, leaving a dangling "JMP_1 <BB#5>" reference behind to cause assertions later. This patch checks that both conditional branch destinations are different before doing the transform. The standard branch folding logic is able to remove both the JMP_1 and the JE_1, and for my test case we end up forming a better conditional tail call later. Fixes PR33980 llvm-svn: 309422
140 lines
4.0 KiB
YAML
140 lines
4.0 KiB
YAML
# RUN: llc -run-pass=branch-folder %s -o - | FileCheck %s
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# PR33980
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# Don't form conditional tail calls when the original conditional branch has
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# the same true and false destination. Otherwise, when we remove the tail call
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# successor we will also remove the fallthrough successor from the CFG.
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# CHECK: body: |
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# CHECK: bb.0.entry:
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# CHECK: successors: %bb.1.sw.bb(0x40000000)
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# CHECK: liveins: %edi
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# CHECK: CMP32ri8 killed %edi, 2, implicit-def %eflags
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# CHECK: TCRETURNdi64cc @mergeable_conditional_tailcall
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# This was the unconditional branch to a dead MBB that we left behind before
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# this bug was fixed.
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# CHECK-NOT: JMP_1 %bb.-1
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--- |
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; ModuleID = 't.ll'
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source_filename = "t.ll"
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target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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target triple = "x86_64--linux"
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@static_local_guard = external global i64, align 8
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; Function Attrs: optsize
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define void @f(i32 %arg) #0 {
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entry:
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switch i32 %arg, label %sw.epilog [
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i32 0, label %sw.bb
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i32 1, label %sw.bb
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i32 2, label %sw.bb2
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]
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sw.bb: ; preds = %entry, %entry
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%tmp = load atomic i8, i8* bitcast (i64* @static_local_guard to i8*) acquire, align 8
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%guard.uninitialized.i = icmp eq i8 %tmp, 0
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br i1 %guard.uninitialized.i, label %init.check.i, label %return, !prof !0
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init.check.i: ; preds = %sw.bb
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tail call void @initialize_static_local(i64* nonnull @static_local_guard)
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ret void
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sw.bb2: ; preds = %entry
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tail call void @mergeable_conditional_tailcall()
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ret void
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sw.epilog: ; preds = %entry
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tail call void @mergeable_conditional_tailcall()
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ret void
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return: ; preds = %sw.bb
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ret void
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}
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declare void @mergeable_conditional_tailcall()
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declare void @initialize_static_local(i64*)
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; Function Attrs: nounwind
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declare void @llvm.stackprotector(i8*, i8**) #1
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attributes #0 = { optsize }
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attributes #1 = { nounwind }
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!0 = !{!"branch_weights", i32 1, i32 1048575}
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...
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---
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name: f
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alignment: 0
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exposesReturnsTwice: false
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legalized: false
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regBankSelected: false
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selected: false
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tracksRegLiveness: true
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registers:
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liveins:
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- { reg: '%edi', virtual-reg: '' }
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frameInfo:
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isFrameAddressTaken: false
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isReturnAddressTaken: false
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hasStackMap: false
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hasPatchPoint: false
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stackSize: 0
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offsetAdjustment: 0
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maxAlignment: 0
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adjustsStack: false
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hasCalls: false
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stackProtector: ''
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maxCallFrameSize: 0
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hasOpaqueSPAdjustment: false
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hasVAStart: false
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hasMustTailInVarArgFunc: false
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savePoint: ''
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restorePoint: ''
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fixedStack:
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stack:
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constants:
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body: |
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bb.0.entry:
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successors: %bb.2.sw.bb(0x40000000), %bb.1.entry(0x40000000)
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liveins: %edi
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CMP32ri8 killed %edi, 2, implicit-def %eflags
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JB_1 %bb.2.sw.bb, implicit %eflags
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JMP_1 %bb.1.entry
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bb.1.entry:
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successors: %bb.4.sw.bb2(0x40000000), %bb.5.sw.epilog(0x40000000)
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liveins: %eflags
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JE_1 %bb.4.sw.bb2, implicit killed %eflags
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JMP_1 %bb.5.sw.epilog
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bb.2.sw.bb:
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successors: %bb.3.init.check.i(0x00000800), %bb.6.return(0x7ffff800)
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%al = ACQUIRE_MOV8rm %rip, 1, _, @static_local_guard, _ :: (volatile load acquire 1 from `i8* bitcast (i64* @static_local_guard to i8*)`, align 8)
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TEST8rr killed %al, %al, implicit-def %eflags
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JNE_1 %bb.6.return, implicit killed %eflags
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JMP_1 %bb.3.init.check.i
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bb.3.init.check.i:
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dead %edi = MOV32ri64 @static_local_guard, implicit-def %rdi
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TCRETURNdi64 @initialize_static_local, 0, csr_64, implicit %rsp, implicit %rdi
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bb.4.sw.bb2:
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TCRETURNdi64 @mergeable_conditional_tailcall, 0, csr_64, implicit %rsp
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bb.5.sw.epilog:
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TCRETURNdi64 @mergeable_conditional_tailcall, 0, csr_64, implicit %rsp
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bb.6.return:
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RET 0
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...
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