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4b4c372886
This patch defines the i1 type as illegal in the X86 backend for AVX512. For DAG operations on <N x i1> types (build vector, extract vector element, ...) i8 is used, and should be truncated/extended. This should produce better scalar code for i1 types since GPRs will be used instead of mask registers. Differential Revision: https://reviews.llvm.org/D32273 llvm-svn: 303421
24 lines
593 B
LLVM
24 lines
593 B
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -fast-isel -mtriple=x86_64-unknown-linux-gnu -mattr=+avx512f | FileCheck %s
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define i1 @test_i1(i1* %b) {
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; CHECK-LABEL: test_i1:
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; CHECK: # BB#0: # %entry
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; CHECK-NEXT: testb $1, (%rdi)
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; CHECK-NEXT: je .LBB0_2
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; CHECK-NEXT: # BB#1: # %in
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; CHECK-NEXT: xorl %eax, %eax
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; CHECK-NEXT: retq
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; CHECK-NEXT: .LBB0_2: # %out
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; CHECK-NEXT: movb $1, %al
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; CHECK-NEXT: retq
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entry:
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%0 = load i1, i1* %b, align 1
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br i1 %0, label %in, label %out
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in:
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ret i1 0
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out:
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ret i1 1
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}
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