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dd29eca4bf
-Don't print the 'x' suffix for the 128-bit reg/mem VEX encoded instructions in Intel syntax. This is consistent with the EVEX versions. -Don't print the 'y' suffix for the 256-bit reg/reg VEX encoded instructions in Intel or AT&T syntax. This is consistent with the EVEX versions. -Allow the 'x' and 'y' suffixes to be used for the reg/mem forms when we're assembling using Intel syntax. -Allow the 'x' and 'y' suffixes on the reg/reg EVEX encoded instructions in Intel or AT&T syntax. This is consistent with what VEX was already allowing. This should fix at least some of PR28850. llvm-svn: 286787
84 lines
2.4 KiB
LLVM
84 lines
2.4 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i686-pc-linux-gnu -mcpu=corei7 | FileCheck %s
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; RUN: llc < %s -mtriple=i686-pc-linux-gnu -mcpu=core-avx-i | FileCheck %s --check-prefix=AVX
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define <1 x float> @test1(<1 x double> %x) nounwind {
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; CHECK-LABEL: test1:
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; CHECK: # BB#0:
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; CHECK-NEXT: pushl %eax
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; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
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; CHECK-NEXT: cvtsd2ss %xmm0, %xmm0
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; CHECK-NEXT: movss %xmm0, (%esp)
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; CHECK-NEXT: flds (%esp)
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; CHECK-NEXT: popl %eax
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; CHECK-NEXT: retl
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;
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; AVX-LABEL: test1:
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; AVX: # BB#0:
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; AVX-NEXT: pushl %eax
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; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
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; AVX-NEXT: vcvtsd2ss %xmm0, %xmm0, %xmm0
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; AVX-NEXT: vmovss %xmm0, (%esp)
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; AVX-NEXT: flds (%esp)
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; AVX-NEXT: popl %eax
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; AVX-NEXT: retl
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%y = fptrunc <1 x double> %x to <1 x float>
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ret <1 x float> %y
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}
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define <2 x float> @test2(<2 x double> %x) nounwind {
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; CHECK-LABEL: test2:
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; CHECK: # BB#0:
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; CHECK-NEXT: cvtpd2ps %xmm0, %xmm0
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; CHECK-NEXT: retl
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;
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; AVX-LABEL: test2:
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; AVX: # BB#0:
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; AVX-NEXT: vcvtpd2ps %xmm0, %xmm0
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; AVX-NEXT: retl
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%y = fptrunc <2 x double> %x to <2 x float>
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ret <2 x float> %y
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}
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define <4 x float> @test3(<4 x double> %x) nounwind {
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; CHECK-LABEL: test3:
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; CHECK: # BB#0:
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; CHECK-NEXT: cvtpd2ps %xmm1, %xmm1
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; CHECK-NEXT: cvtpd2ps %xmm0, %xmm0
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; CHECK-NEXT: unpcklpd {{.*#+}} xmm0 = xmm0[0],xmm1[0]
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; CHECK-NEXT: retl
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;
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; AVX-LABEL: test3:
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; AVX: # BB#0:
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; AVX-NEXT: vcvtpd2ps %ymm0, %xmm0
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; AVX-NEXT: vzeroupper
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; AVX-NEXT: retl
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%y = fptrunc <4 x double> %x to <4 x float>
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ret <4 x float> %y
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}
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define <8 x float> @test4(<8 x double> %x) nounwind {
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; CHECK-LABEL: test4:
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; CHECK: # BB#0:
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; CHECK-NEXT: subl $12, %esp
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; CHECK-NEXT: cvtpd2ps %xmm1, %xmm1
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; CHECK-NEXT: cvtpd2ps %xmm0, %xmm0
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; CHECK-NEXT: unpcklpd {{.*#+}} xmm0 = xmm0[0],xmm1[0]
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; CHECK-NEXT: cvtpd2ps %xmm2, %xmm1
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; CHECK-NEXT: cvtpd2ps {{[0-9]+}}(%esp), %xmm2
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; CHECK-NEXT: unpcklpd {{.*#+}} xmm1 = xmm1[0],xmm2[0]
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; CHECK-NEXT: addl $12, %esp
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; CHECK-NEXT: retl
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;
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; AVX-LABEL: test4:
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; AVX: # BB#0:
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; AVX-NEXT: vcvtpd2ps %ymm0, %xmm0
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; AVX-NEXT: vcvtpd2ps %ymm1, %xmm1
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; AVX-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
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; AVX-NEXT: retl
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%y = fptrunc <8 x double> %x to <8 x float>
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ret <8 x float> %y
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}
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