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fb1214dfc3
We did not support subregs in InlineSpiller:foldMemoryOperand() because targets may not deal with them correctly. This adds a target hook to let the spiller know that a target can handle subregs, and actually enables it for x86 for the case of stack slot reloads. This fixes PR30832. Differential Revision: https://reviews.llvm.org/D26521 llvm-svn: 287792
42 lines
1.8 KiB
LLVM
42 lines
1.8 KiB
LLVM
; RUN: llc -mtriple=x86_64-unknown-linux-gnu -enable-misched=false < %s | FileCheck %s
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define i32 @fold64to32(i64 %add, i32 %spill) {
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; CHECK-LABEL: fold64to32:
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; CHECK: movq %rdi, -{{[0-9]+}}(%rsp) # 8-byte Spill
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; CHECK: subl -{{[0-9]+}}(%rsp), %esi # 4-byte Folded Reload
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entry:
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tail call void asm sideeffect "", "~{rax},~{rbx},~{rcx},~{rdx},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15},~{dirflag},~{fpsr},~{flags}"()
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%trunc = trunc i64 %add to i32
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%sub = sub i32 %spill, %trunc
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ret i32 %sub
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}
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define i8 @fold64to8(i64 %add, i8 %spill) {
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; CHECK-LABEL: fold64to8:
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; CHECK: movq %rdi, -{{[0-9]+}}(%rsp) # 8-byte Spill
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; CHECK: subb -{{[0-9]+}}(%rsp), %sil # 1-byte Folded Reload
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entry:
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tail call void asm sideeffect "", "~{rax},~{rbx},~{rcx},~{rdx},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15},~{dirflag},~{fpsr},~{flags}"()
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%trunc = trunc i64 %add to i8
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%sub = sub i8 %spill, %trunc
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ret i8 %sub
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}
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; Do not fold a 4-byte store into a 8-byte spill slot
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; CHECK-LABEL: nofold
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; CHECK: movq %rsi, -{{[0-9]+}}(%rsp) # 8-byte Spill
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; CHECK: movq -{{[0-9]+}}(%rsp), %rax # 8-byte Reload
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; CHECK: subl %edi, %eax
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; CHECK: movq %rax, -{{[0-9]+}}(%rsp) # 8-byte Spill
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; CHECK: movq -{{[0-9]+}}(%rsp), %rax # 8-byte Reload
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define i32 @nofold(i64 %add, i64 %spill) {
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entry:
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tail call void asm sideeffect "", "~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15},~{dirflag},~{fpsr},~{flags}"()
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%trunc = trunc i64 %add to i32
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%truncspill = trunc i64 %spill to i32
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%sub = sub i32 %truncspill, %trunc
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tail call void asm sideeffect "", "~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15},~{dirflag},~{fpsr},~{flags}"()
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ret i32 %sub
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}
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