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AsmParser
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AMDGPU: Update AMDHSA code object version handling
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2020-10-14 13:04:27 -04:00 |
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Disassembler
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[AMDGPU] Add MC layer support for v_fmac_legacy_f32
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2020-10-13 21:57:33 +01:00 |
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MCTargetDesc
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[AMDGPU] gfx1032 target
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2020-10-15 12:41:18 -07:00 |
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TargetInfo
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Utils
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AMDGPU: Update AMDHSA code object version handling
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2020-10-14 13:04:27 -04:00 |
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AMDGPU.h
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AMDGPU: Remove SIFixupVectorISel pass
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2020-08-15 12:11:51 -04:00 |
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AMDGPU.td
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[AMDGPU] flat scratch ST addressing mode on gfx10
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2020-10-19 15:29:52 -07:00 |
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AMDGPUAliasAnalysis.cpp
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[amdgpu] Enhance AMDGPU AA.
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2020-10-20 09:54:12 -04:00 |
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AMDGPUAliasAnalysis.h
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Remove orphan AMDGPUAAResult::Aliases and AMDGPUAAResult::PathAliases declarations. NFC.
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2020-06-25 16:00:44 +01:00 |
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AMDGPUAlwaysInlinePass.cpp
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AMDGPU: Hack out noinline on functions using LDS globals
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2020-04-02 14:12:07 -04:00 |
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AMDGPUAnnotateKernelFeatures.cpp
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AMDGPU: Annotate functions that have stack objects
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2020-05-19 18:51:00 -04:00 |
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AMDGPUAnnotateUniformValues.cpp
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AMDGPU: Put inexpensive ops first in AMDGPUAnnotateUniformValues::visitLoadInst
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2020-07-30 14:37:06 -07:00 |
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AMDGPUArgumentUsageInfo.cpp
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AMDGPU/GlobalISel: Add types to special inputs
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2020-07-06 17:00:55 -04:00 |
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AMDGPUArgumentUsageInfo.h
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AMDGPU: Use MCRegister for preloaded arguments
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2020-07-20 13:34:28 -04:00 |
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AMDGPUAsmPrinter.cpp
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AMDGPU: Lower the threshold reported for maximum stack size exceeded
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2020-10-21 12:06:27 -04:00 |
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AMDGPUAsmPrinter.h
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[AsmPrinter][MCStreamer] De-capitalize EmitInstruction and EmitCFI*
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2020-02-13 22:08:55 -08:00 |
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AMDGPUAtomicOptimizer.cpp
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[AMDGPU] Do not generate mul with 1 in AMDGPU Atomic Optimizer
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2020-09-30 11:09:18 +02:00 |
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AMDGPUCallingConv.td
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AMDGPU: Implement getNoPreservedMask
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2020-10-22 10:17:31 -04:00 |
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AMDGPUCallLowering.cpp
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AMDGPU/GlobalISel: Stop using G_EXTRACT in argument lowering
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2020-08-06 09:55:35 -04:00 |
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AMDGPUCallLowering.h
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AMDGPU/GlobalISel: Mark GlobalISel classes as final
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2020-07-28 11:42:17 -04:00 |
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AMDGPUCodeGenPrepare.cpp
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SelectionDAG.h - remove unnecessary FunctionLoweringInfo.h include. NFCI.
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2020-09-03 18:33:25 +01:00 |
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AMDGPUCombine.td
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[GlobalISel] Rewrite the elide-br-by-swapping-icmp-ops combine to do less.
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2020-09-09 13:08:16 -07:00 |
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AMDGPUExportClustering.cpp
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[AMDGPU] Strengthen export cluster ordering
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2020-05-13 23:07:37 +09:00 |
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AMDGPUExportClustering.h
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[AMDGPU] Cluster shader exports
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2020-05-07 19:05:38 +09:00 |
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AMDGPUFeatures.td
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AMDGPU: Change internal tracking of wave size
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2020-06-01 17:55:08 -04:00 |
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AMDGPUFixFunctionBitcasts.cpp
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AMDGPU.h - reduce TargetMachine.h include. NFC.
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2020-05-24 15:27:41 +01:00 |
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AMDGPUFrameLowering.cpp
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AMDGPUFrameLowering.h
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AMDGPUGenRegisterBankInfo.def
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AMDGPU/GlobalISel: Fix missing 256-bit AGPR mapping
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2020-08-17 09:53:26 -04:00 |
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AMDGPUGISel.td
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[AMDGPU][GlobalISel] Fix 96 and 128 local loads and stores
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2020-08-21 12:26:31 +02:00 |
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AMDGPUGlobalISelUtils.cpp
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AMDGPU/GlobalISel: Select G_SHUFFLE_VECTOR
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2020-02-21 13:35:40 -05:00 |
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AMDGPUGlobalISelUtils.h
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[AMDGPU] Use tablegen for argument indices
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2020-10-05 11:50:52 +02:00 |
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AMDGPUHSAMetadataStreamer.cpp
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AMDGPU: Start interpreting byref on kernel arguments
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2020-07-21 18:11:22 -04:00 |
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AMDGPUHSAMetadataStreamer.h
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AMDGPU: Start interpreting byref on kernel arguments
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2020-07-21 18:11:22 -04:00 |
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AMDGPUInline.cpp
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[NFC] Remove unused GetUnderlyingObject paramenter
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2020-07-31 02:10:03 -07:00 |
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AMDGPUInstCombineIntrinsic.cpp
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[AMDGPU] Add simplification/combines for llvm.amdgcn.fmul.legacy
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2020-10-23 09:31:00 +01:00 |
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AMDGPUInstrInfo.cpp
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[AMDGPU] Remove AMDGPURegisterInfo
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2020-02-11 11:13:38 -08:00 |
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AMDGPUInstrInfo.h
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[AMDGPU] Use tablegen for argument indices
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2020-10-05 11:50:52 +02:00 |
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AMDGPUInstrInfo.td
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AMDGPU: Remove intermediate DAG node for trig_preop intrinsic
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2020-06-16 21:06:25 -04:00 |
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AMDGPUInstructions.td
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[AMDGPU] Split R600 and GCN bfe patterns
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2020-10-05 09:55:10 +01:00 |
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AMDGPUInstructionSelector.cpp
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[AMDGPU] Implement hardware bug workaround for image instructions
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2020-10-07 07:39:52 -04:00 |
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AMDGPUInstructionSelector.h
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[AMDGPU] global-isel support for RT
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2020-09-24 10:29:45 -07:00 |
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AMDGPUISelDAGToDAG.cpp
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[AMDGPU] Simplify getNumFlatOffsetBits. NFC.
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2020-10-01 15:24:09 +01:00 |
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AMDGPUISelLowering.cpp
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[AMDGPU] Fix expansion of i16 MULH
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2020-10-22 17:05:06 +02:00 |
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AMDGPUISelLowering.h
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[AMDGPU] Remove unused declaration. NFC.
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2020-10-20 16:31:42 +01:00 |
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AMDGPULegalizerInfo.cpp
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[AMDGPU] Remove fix up operand from SI_ELSE
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2020-10-20 19:15:21 +09:00 |
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AMDGPULegalizerInfo.h
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[AMDGPU] Implement hardware bug workaround for image instructions
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2020-10-07 07:39:52 -04:00 |
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AMDGPULibCalls.cpp
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Use llvm::is_contained where appropriate (NFC)
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2020-07-27 10:20:44 -07:00 |
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AMDGPULibFunc.cpp
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[SVE] Eliminate calls to default-false VectorType::get() from AMDGPU
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2020-05-29 17:54:17 -07:00 |
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AMDGPULibFunc.h
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AMDGPULibFunc - fix include order. NFC.
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2020-05-24 13:25:59 +01:00 |
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AMDGPULowerIntrinsics.cpp
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AMDGPU: Use caller subtarget, not intrinsic declaration
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2020-08-27 16:42:09 -04:00 |
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AMDGPULowerKernelArguments.cpp
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AMDGPU: Start interpreting byref on kernel arguments
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2020-07-21 18:11:22 -04:00 |
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AMDGPULowerKernelAttributes.cpp
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AMDGPUMachineCFGStructurizer.cpp
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[AMDGPU] Apply llvm-prefer-register-over-unsigned from clang-tidy
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2020-08-21 10:14:35 +01:00 |
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AMDGPUMachineFunction.cpp
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[amdgpu] Add codegen support for HIP dynamic shared memory.
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2020-08-20 21:29:18 -04:00 |
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AMDGPUMachineFunction.h
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[amdgpu] Add codegen support for HIP dynamic shared memory.
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2020-08-20 21:29:18 -04:00 |
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AMDGPUMachineModuleInfo.cpp
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AMDGPUMachineModuleInfo.h
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AMDGPUMacroFusion.cpp
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[AMDGPU] Extend macro fusion for ADDC and SUBB to SUBBREV
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2020-03-11 17:59:21 +00:00 |
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AMDGPUMacroFusion.h
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AMDGPUMCInstLower.cpp
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[AsmPrinter][MCStreamer] De-capitalize EmitInstruction and EmitCFI*
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2020-02-13 22:08:55 -08:00 |
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AMDGPUOpenCLEnqueuedBlockLowering.cpp
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Avoid SmallString.h include in MD5.h, NFC
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2020-02-26 09:10:24 -08:00 |
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AMDGPUPerfHintAnalysis.cpp
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AMDGPU.h - reduce TargetMachine.h include. NFC.
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2020-05-24 15:27:41 +01:00 |
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AMDGPUPerfHintAnalysis.h
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AMDGPUPostLegalizerCombiner.cpp
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AMDGPU/GlobalISel: Fix using post-legal combiner without LegalizerInfo
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2020-08-17 09:19:22 -04:00 |
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AMDGPUPreLegalizerCombiner.cpp
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AMDGPU/GlobalISel: Mark GlobalISel classes as final
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2020-07-28 11:42:17 -04:00 |
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AMDGPUPrintfRuntimeBinding.cpp
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AMDGPUPrintfRuntimeBinding.cpp - drop unnecessary casts/dyn_casts. NFCI.
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2020-09-15 14:49:04 +01:00 |
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AMDGPUPromoteAlloca.cpp
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[NFC] Remove unused GetUnderlyingObject paramenter
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2020-07-31 02:10:03 -07:00 |
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AMDGPUPropagateAttributes.cpp
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AMDGPU: Propagate amdgpu-flat-work-group-size attributes
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2020-10-21 12:06:24 -04:00 |
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AMDGPUPTNote.h
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AMDGPURegBankCombiner.cpp
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AMDGPU/GlobalISel: Mark GlobalISel classes as final
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2020-07-28 11:42:17 -04:00 |
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AMDGPURegisterBankInfo.cpp
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[AMDGPU] Add new llvm.amdgcn.fma.legacy intrinsic
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2020-10-16 17:10:21 +01:00 |
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AMDGPURegisterBankInfo.h
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AMDGPU/GlobalISel: Start trying to handle AGPR bank
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2020-08-06 12:39:50 -04:00 |
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AMDGPURegisterBanks.td
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AMDGPU/GlobalISel: Add SReg_96 to SGPRRegBank
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2020-07-28 16:49:55 -04:00 |
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AMDGPURewriteOutArguments.cpp
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[SVE] Remove usages of VectorType::getNumElements() from AMDGPU
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2020-05-13 15:57:55 -07:00 |
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AMDGPUSearchableTables.td
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AMDGPU: Define raw/struct variants of buffer atomic fadd
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2020-08-06 13:36:19 -04:00 |
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AMDGPUSubtarget.cpp
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AMDGPU: Update AMDHSA code object version handling
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2020-10-14 13:04:27 -04:00 |
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AMDGPUSubtarget.h
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AMDGPU: Lower the threshold reported for maximum stack size exceeded
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2020-10-21 12:06:27 -04:00 |
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AMDGPUTargetMachine.cpp
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[HazardRec] Allow inserting multiple wait-states simultaneously
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2020-10-20 17:03:47 -07:00 |
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AMDGPUTargetMachine.h
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Support addrspacecast initializers with isNoopAddrSpaceCast
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2020-07-31 10:42:43 -04:00 |
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AMDGPUTargetObjectFile.cpp
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AMDGPUTargetObjectFile.h
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AMDGPUTargetObjectFile.h - remove unnecessary includes. NFC.
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2020-05-24 13:57:02 +01:00 |
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AMDGPUTargetTransformInfo.cpp
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[AMDGPU] Add amdgpu specific loop threshold metadata
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2020-10-22 17:21:32 +01:00 |
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AMDGPUTargetTransformInfo.h
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AMDGPU: Update AMDHSA code object version handling
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2020-10-14 13:04:27 -04:00 |
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AMDGPUUnifyDivergentExitNodes.cpp
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Reland "[NFC] SimplifyCFGOptions: drop multi-parameter ctor, use default member-init"
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2020-07-16 13:40:01 +03:00 |
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AMDGPUUnifyMetadata.cpp
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Use llvm::is_contained where appropriate (NFC)
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2020-07-27 10:20:44 -07:00 |
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AMDILCFGStructurizer.cpp
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AMDKernelCodeT.h
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BUFInstructions.td
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[AMDGPU][TableGen] Make more use of !ne !not !and !or. NFC.
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2020-10-21 09:56:43 +01:00 |
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CaymanInstructions.td
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[AMDGPU] Fix and simplify AMDGPUTargetLowering::LowerUDIVREM
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2020-07-08 19:14:49 +01:00 |
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CMakeLists.txt
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AMDGPU: Remove SIFixupVectorISel pass
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2020-08-15 12:11:51 -04:00 |
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DSInstructions.td
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[AMDGPU][TableGen] Make more use of !ne !not !and !or. NFC.
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2020-10-21 09:56:43 +01:00 |
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EvergreenInstructions.td
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[AMDGPU] Split R600 and GCN bfe patterns
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2020-10-05 09:55:10 +01:00 |
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FLATInstructions.td
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[AMDGPU][TableGen] Make more use of !ne !not !and !or. NFC.
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2020-10-21 09:56:43 +01:00 |
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GCNDPPCombine.cpp
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AMDGPU: Rename add/sub with carry out instructions
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2020-07-16 13:16:30 -04:00 |
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GCNHazardRecognizer.cpp
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[AMDGPU] Avoid inserting noops during scheduling
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2020-10-20 17:11:36 -07:00 |
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GCNHazardRecognizer.h
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[AMDGPU] prefer non-mfma in post-RA schedule
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2020-07-29 12:17:50 -07:00 |
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GCNILPSched.cpp
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GCNIterativeScheduler.cpp
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GCNIterativeScheduler.h
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GCNMinRegStrategy.cpp
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Revert "[NFC][ScheduleDAG] Remove unused EntrySU SUnit"
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2020-09-21 13:33:05 +02:00 |
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GCNNSAReassign.cpp
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[NFC][MC] Use MCRegister in LiveRangeMatrix
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2020-10-12 08:54:36 -07:00 |
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GCNProcessors.td
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[AMDGPU] gfx1032 target
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2020-10-15 12:41:18 -07:00 |
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GCNRegBankReassign.cpp
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[NFC][MC] Use MCRegister in LiveRangeMatrix
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2020-10-12 08:54:36 -07:00 |
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GCNRegPressure.cpp
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[AMDGPU] Remove uses of Register::isPhysicalRegister/isVirtualRegister
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2020-08-20 17:59:11 +01:00 |
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GCNRegPressure.h
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[AMDGPU] Remove uses of Register::isPhysicalRegister/isVirtualRegister
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2020-08-20 17:59:11 +01:00 |
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GCNSchedStrategy.cpp
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[AMDGPU] Fix not rescheduling without clustering
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2020-08-07 11:15:58 -07:00 |
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GCNSchedStrategy.h
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InstCombineTables.td
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[InstCombine] Move target-specific inst combining
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2020-07-22 15:59:49 +02:00 |
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LLVMBuild.txt
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MIMGInstructions.td
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[AMDGPU][TableGen] Make more use of !ne !not !and !or. NFC.
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2020-10-21 09:56:43 +01:00 |
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R600.td
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R600AsmPrinter.cpp
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[MC] Add MCStreamer::emitInt{8,16,32,64}
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2020-02-29 09:40:21 -08:00 |
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R600AsmPrinter.h
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[AsmPrinter][MCStreamer] De-capitalize EmitInstruction and EmitCFI*
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2020-02-13 22:08:55 -08:00 |
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R600ClauseMergePass.cpp
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R600ControlFlowFinalizer.cpp
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[AMDGPU] Make use of divideCeil. NFC.
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2020-03-26 16:11:35 +00:00 |
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R600Defines.h
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R600EmitClauseMarkers.cpp
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R600ExpandSpecialInstrs.cpp
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[AMDGPU] Split R600 and GCN subregs
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2020-02-10 08:29:56 -08:00 |
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R600FrameLowering.cpp
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CodeGen: Use Register in TargetFrameLowering
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2020-04-07 17:07:44 -04:00 |
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R600FrameLowering.h
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CodeGen: Use Register in TargetFrameLowering
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2020-04-07 17:07:44 -04:00 |
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R600InstrFormats.td
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R600InstrInfo.cpp
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Add "SkipDead" parameter to TargetInstrInfo::DefinesPredicate
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2020-10-21 11:52:47 +01:00 |
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R600InstrInfo.h
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Add "SkipDead" parameter to TargetInstrInfo::DefinesPredicate
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2020-10-21 11:52:47 +01:00 |
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R600Instructions.td
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[NFC] Remove unused GetUnderlyingObject paramenter
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2020-07-31 02:10:03 -07:00 |
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R600ISelLowering.cpp
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[AMDGPU] Use cast instead of dyn_cast
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2020-09-24 15:20:49 +01:00 |
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R600ISelLowering.h
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R600MachineFunctionInfo.cpp
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R600MachineFunctionInfo.h
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R600MachineScheduler.cpp
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[AMDGPU] Remove uses of Register::isPhysicalRegister/isVirtualRegister
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2020-08-20 17:59:11 +01:00 |
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R600MachineScheduler.h
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[AMDGPU] Remove uses of Register::isPhysicalRegister/isVirtualRegister
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2020-08-20 17:59:11 +01:00 |
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R600OpenCLImageTypeLoweringPass.cpp
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R600OptimizeVectorRegisters.cpp
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AMDGPU: Use Register
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2020-06-30 12:13:08 -04:00 |
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R600Packetizer.cpp
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R600Processors.td
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R600RegisterInfo.cpp
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[AMDGPU] Remove uses of Register::isPhysicalRegister/isVirtualRegister
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2020-08-20 17:59:11 +01:00 |
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R600RegisterInfo.h
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[AMDGPU] Remove uses of Register::isPhysicalRegister/isVirtualRegister
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2020-08-20 17:59:11 +01:00 |
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R600RegisterInfo.td
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[TBLGEN] Allow to override RC weight
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2020-02-14 15:49:52 -08:00 |
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R600Schedule.td
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R700Instructions.td
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SIAddIMGInit.cpp
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[AMDGPU] gfx1030 RT support
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2020-09-16 11:40:58 -07:00 |
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SIAnnotateControlFlow.cpp
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SIDefines.h
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[AMDGPU][MC] Corrected parser to avoid generation of excessive error messages
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2020-09-02 19:42:18 +03:00 |
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SIFixSGPRCopies.cpp
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[AMDGPU] Fix merging m0 inits
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2020-09-23 09:13:43 +02:00 |
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SIFixVGPRCopies.cpp
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SIFoldOperands.cpp
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[AMDGPU] More codegen patterns for v2i16/v2f16 build_vector
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2020-09-22 10:41:38 +01:00 |
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SIFormMemoryClauses.cpp
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[AMDGPU] Remove uses of Register::isPhysicalRegister/isVirtualRegister
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2020-08-20 17:59:11 +01:00 |
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SIFrameLowering.cpp
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[AMDGPU] Use isLegalMUBUFImmOffset more
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2020-10-08 14:31:44 +02:00 |
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SIFrameLowering.h
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AMDGPU: Correct prolog SP initialization logic
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2020-08-05 15:47:53 -04:00 |
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SIInsertHardClauses.cpp
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[AMDGPU/MemOpsCluster] Let mem ops clustering logic also consider number of clustered bytes
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2020-06-01 22:52:34 +05:30 |
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SIInsertSkips.cpp
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[AMDGPU] SIInsertSkips: Refactor early exit block creation
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2020-10-06 09:44:55 +09:00 |
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SIInsertWaitcnts.cpp
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[AMDGPU] Optimize waitcnt insertion for flat memory operations
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2020-10-20 22:55:12 +00:00 |
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SIInstrFormats.td
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[AMDGPU][TableGen] Make more use of !ne !not !and !or. NFC.
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2020-10-21 09:56:43 +01:00 |
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SIInstrInfo.cpp
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[HazardRec] Allow inserting multiple wait-states simultaneously
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2020-10-20 17:03:47 -07:00 |
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SIInstrInfo.h
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[HazardRec] Allow inserting multiple wait-states simultaneously
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2020-10-20 17:03:47 -07:00 |
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SIInstrInfo.td
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[AMDGPU] Refactor SOPC & SOPP .td for extension
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2020-10-21 12:35:52 -04:00 |
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SIInstructions.td
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[AMDGPU] Remove fix up operand from SI_ELSE
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2020-10-20 19:15:21 +09:00 |
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SIISelLowering.cpp
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[AMDGPU] Do not generate S_CMP_LG_U64 on gfx7
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2020-10-19 14:44:31 +02:00 |
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SIISelLowering.h
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[AMDGPU] Implement hardware bug workaround for image instructions
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2020-10-07 07:39:52 -04:00 |
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SILoadStoreOptimizer.cpp
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[AMDGPU] gfx1030 RT support
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2020-09-16 11:40:58 -07:00 |
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SILowerControlFlow.cpp
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[AMDGPU] Remove fix up operand from SI_ELSE
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2020-10-20 19:15:21 +09:00 |
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SILowerI1Copies.cpp
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[AMDGPU] Apply llvm-prefer-register-over-unsigned from clang-tidy
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2020-08-21 10:14:35 +01:00 |
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SILowerSGPRSpills.cpp
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[AMDGPU] Remove getAllVGPR32() which cannot handle Accum VGPRs properly
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2020-10-20 23:15:24 +05:30 |
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SIMachineFunctionInfo.cpp
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AMDGPU: Fix not always reserving VGPRs used for SGPR spilling
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2020-10-22 10:19:19 -04:00 |
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SIMachineFunctionInfo.h
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[amdgpu] Add codegen support for HIP dynamic shared memory.
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2020-08-20 21:29:18 -04:00 |
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SIMachineScheduler.cpp
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[AMDGPU] Remove uses of Register::isPhysicalRegister/isVirtualRegister
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2020-08-20 17:59:11 +01:00 |
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SIMachineScheduler.h
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Revert "[NFC][ScheduleDAG] Remove unused EntrySU SUnit"
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2020-09-21 13:33:05 +02:00 |
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SIMemoryLegalizer.cpp
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[NFC][AMDGPU] Reorder SIMemoryLegalizer functions to be consistent
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2020-10-22 05:39:18 +00:00 |
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SIModeRegister.cpp
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[AMDGPU] Enable scheduling around FP MODE-setting instructions
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2020-09-16 16:10:47 +01:00 |
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SIOptimizeExecMasking.cpp
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AMDGPU: Don't sometimes allow instructions before lowered si_end_cf
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2020-09-18 13:43:01 -04:00 |
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SIOptimizeExecMaskingPreRA.cpp
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[AMDGPU] Remove fix up operand from SI_ELSE
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2020-10-20 19:15:21 +09:00 |
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SIPeepholeSDWA.cpp
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[AMDGPU] Remove uses of Register::isPhysicalRegister/isVirtualRegister
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2020-08-20 17:59:11 +01:00 |
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SIPostRABundler.cpp
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AMDGPU: Do not bundle inline asm
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2020-06-14 13:24:50 -04:00 |
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SIPreAllocateWWMRegs.cpp
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[NFC][MC] Use MCRegister in LiveRangeMatrix
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2020-10-12 08:54:36 -07:00 |
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SIPreEmitPeephole.cpp
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[AMDGPU] Fix missed SI_RETURN_TO_EPILOG in pre-emit peephole
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2020-08-13 21:52:41 +09:00 |
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SIProgramInfo.h
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SIRegisterInfo.cpp
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AMDGPU: Fix not always reserving VGPRs used for SGPR spilling
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2020-10-22 10:19:19 -04:00 |
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SIRegisterInfo.h
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AMDGPU: Implement getNoPreservedMask
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2020-10-22 10:17:31 -04:00 |
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SIRegisterInfo.td
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[AMDGPU][TableGen] Make more use of !ne !not !and !or. NFC.
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2020-10-21 09:56:43 +01:00 |
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SIRemoveShortExecBranches.cpp
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SISchedule.td
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[AMDGPU] Add XDL resource to scheduling model
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2020-09-14 13:48:54 -07:00 |
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SIShrinkInstructions.cpp
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[AMDGPU] Fixed v_swap_b32 match
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2020-10-21 10:14:24 -07:00 |
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SIWholeQuadMode.cpp
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[AMDGPU] Remove fix up operand from SI_ELSE
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2020-10-20 19:15:21 +09:00 |
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SMInstructions.td
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AMDGPU: Remove mayLoad/mayStore from some side effecting intrinsics
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2020-06-18 14:12:19 -04:00 |
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SOPInstructions.td
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[AMDGPU] Refactor SOPC & SOPP .td for extension
|
2020-10-21 12:35:52 -04:00 |
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VIInstrFormats.td
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VOP1Instructions.td
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[AMDGPU] Removed s_mov_regrd and mov_fed opcodes
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2020-07-17 19:52:54 +03:00 |
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VOP2Instructions.td
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[AMDGPU] Add MC layer support for v_fmac_legacy_f32
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2020-10-13 21:57:33 +01:00 |
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VOP3Instructions.td
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[AMDGPU][TableGen] Make more use of !ne !not !and !or. NFC.
|
2020-10-21 09:56:43 +01:00 |
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VOP3PInstructions.td
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[AMDGPU][TableGen] Make more use of !ne !not !and !or. NFC.
|
2020-10-21 09:56:43 +01:00 |
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VOPCInstructions.td
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AMDGPU: Start adding MODE register uses to instructions
|
2020-05-27 14:47:00 -04:00 |
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VOPInstructions.td
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[AMDGPU][TableGen] Make more use of !ne !not !and !or. NFC.
|
2020-10-21 09:56:43 +01:00 |
