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llvm-mirror/test/CodeGen
Craig Topper 4f5992325a [X86] Add CMPXCHG8B feature flag. Set it for all CPUs except i386/i486 including 'generic'. Disable use of CMPXCHG8B when this flag isn't set.
CMPXCHG8B was introduced on i586/pentium generation.

If its not enabled, limit the atomic width to 32 bits so the AtomicExpandPass will expand to lib calls. Unclear if we should be using a different limit for other configs. The default is 1024 and experimentation shows that using an i256 atomic will cause a crash in SelectionDAG.

Differential Revision: https://reviews.llvm.org/D59576

llvm-svn: 356631
2019-03-20 23:35:49 +00:00
..
AArch64 [AArch64][GlobalISel] Add an optimization to select vector DUP instructions. 2019-03-19 21:43:05 +00:00
AMDGPU Allow machine dce to remove uses in the same instruction 2019-03-20 21:42:05 +00:00
ARC [ARC] Add ARCOptAddrMode pass to generate postincrement loads/stores. 2019-03-20 20:06:21 +00:00
ARM [ARM] Eliminate redundant "mov rN, sp" instructions in Thumb1. 2019-03-20 19:40:45 +00:00
AVR
BPF [BPF] Add BTF Var and DataSec Support 2019-03-16 15:36:31 +00:00
Generic
Hexagon
Inputs
Lanai
Mips RegAllocFast: Remove early selection loop, the spill calculation will report cost 0 anyway for free regs 2019-03-19 19:01:34 +00:00
MIR
MSP430
NVPTX
PowerPC RegAllocFast: Remove early selection loop, the spill calculation will report cost 0 anyway for free regs 2019-03-19 19:01:34 +00:00
RISCV
SPARC
SystemZ RegAllocFast: Remove early selection loop, the spill calculation will report cost 0 anyway for free regs 2019-03-19 19:01:34 +00:00
Thumb [ARM] Eliminate redundant "mov rN, sp" instructions in Thumb1. 2019-03-20 19:40:45 +00:00
Thumb2 [ARM] Check that CPSR does not have other uses 2019-03-17 21:36:15 +00:00
WebAssembly [WebAssembly] Target features section 2019-03-20 20:26:45 +00:00
WinCFGuard
WinEH
X86 [X86] Add CMPXCHG8B feature flag. Set it for all CPUs except i386/i486 including 'generic'. Disable use of CMPXCHG8B when this flag isn't set. 2019-03-20 23:35:49 +00:00
XCore