Bill Schmidt 4e099704b5 Index: test/CodeGen/PowerPC/reloc-align.ll ... =================================================================== --- test/CodeGen/PowerPC/reloc-align.ll (revision 0) +++ test/CodeGen/PowerPC/reloc-align.ll (revision 0) @@ -0,0 +1,34 @@ +; RUN: llc -mcpu=pwr7 -O1 < %s | FileCheck %s + +; This test verifies that the peephole optimization of address accesses +; does not produce a load or store with a relocation that can't be +; satisfied for a given instruction encoding. Reduced from a test supplied +; by Hal Finkel. + +target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64" +target triple = "powerpc64-unknown-linux-gnu" + +%struct.S1 = type { [8 x i8] } + +@main.l_1554 = internal global { i8, i8, i8, i8, i8, i8, i8, i8 } { i8 -1, i8 -6, i8 57, i8 62, i8 -48, i8 0, i8 58, i8 80 }, align 1 + +; Function Attrs: nounwind readonly +define signext i32 @main() #0 { +entry: + %call = tail call fastcc signext i32 @func_90(%struct.S1* byval bitcast ({ i8, i8, i8, i8, i8, i8, i8, i8 }* @main.l_1554 to %struct.S1*)) +; CHECK-NOT: ld {{[0-9]+}}, main.l_1554@toc@l + ret i32 %call +} + +; Function Attrs: nounwind readonly +define internal fastcc signext i32 @func_90(%struct.S1* byval nocapture %p_91) #0 { +entry: + %0 = bitcast %struct.S1* %p_91 to i64* + %bf.load = load i64* %0, align 1 + %bf.shl = shl i64 %bf.load, 26 + %bf.ashr = ashr i64 %bf.shl, 54 + %bf.cast = trunc i64 %bf.ashr to i32 + ret i32 %bf.cast +} + +attributes #0 = { nounwind readonly "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf"="true" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" } Index: lib/Target/PowerPC/PPCAsmPrinter.cpp =================================================================== --- lib/Target/PowerPC/PPCAsmPrinter.cpp (revision 185327) +++ lib/Target/PowerPC/PPCAsmPrinter.cpp (working copy) @@ -679,7 +679,26 @@ void PPCAsmPrinter::EmitInstruction(const MachineI OutStreamer.EmitRawText(StringRef("\tmsync")); return; } + break; + case PPC::LD: + case PPC::STD: + case PPC::LWA: { + // Verify alignment is legal, so we don't create relocations + // that can't be supported. + // FIXME: This test is currently disabled for Darwin. The test + // suite shows a handful of test cases that fail this check for + // Darwin. Those need to be investigated before this sanity test + // can be enabled for those subtargets. + if (!Subtarget.isDarwin()) { + unsigned OpNum = (MI->getOpcode() == PPC::STD) ? 2 : 1; + const MachineOperand &MO = MI->getOperand(OpNum); + if (MO.isGlobal() && MO.getGlobal()->getAlignment() < 4) + llvm_unreachable("Global must be word-aligned for LD, STD, LWA!"); + } + // Now process the instruction normally. + break; } + } LowerPPCMachineInstrToMCInst(MI, TmpInst, *this); OutStreamer.EmitInstruction(TmpInst); Index: lib/Target/PowerPC/PPCISelDAGToDAG.cpp =================================================================== --- lib/Target/PowerPC/PPCISelDAGToDAG.cpp (revision 185327) +++ lib/Target/PowerPC/PPCISelDAGToDAG.cpp (working copy) @@ -1530,6 +1530,14 @@ void PPCDAGToDAGISel::PostprocessISelDAG() { if (GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(ImmOpnd)) { SDLoc dl(GA); const GlobalValue *GV = GA->getGlobal(); + // We can't perform this optimization for data whose alignment + // is insufficient for the instruction encoding. + if (GV->getAlignment() < 4 && + (StorageOpcode == PPC::LD || StorageOpcode == PPC::STD || + StorageOpcode == PPC::LWA)) { + DEBUG(dbgs() << "Rejected this candidate for alignment.\n\n"); + continue; + } ImmOpnd = CurDAG->getTargetGlobalAddress(GV, dl, MVT::i64, 0, Flags); } else if (ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(ImmOpnd)) { llvm-svn: 185380		2013-07-01 20:52:27 +00:00
..
Analysis	Minimize precision loss when computing cyclic probabilities.	2013-06-28 22:40:43 +00:00
Archive	Fix an ordering problem in the test.	2013-06-21 07:23:14 +00:00
Assembler	Added support for the Builtin attribute.	2013-06-27 00:25:01 +00:00
Bindings/Ocaml
Bitcode
BugPoint
CodeGen	Index: test/CodeGen/PowerPC/reloc-align.ll	2013-07-01 20:52:27 +00:00
DebugInfo	llvm-symbolizer: Recognize a drive letter on win32. Then "REQUIRES: shell" can be removed.	2013-07-01 09:51:42 +00:00
ExecutionEngine	Enable mcjit tests on ppc64 when building with cmake.	2013-06-03 19:17:21 +00:00
Feature	Add a new function attribute 'cold' to functions.	2013-05-24 12:26:52 +00:00
FileCheck
Instrumentation	[asan] workaround for PR16277: don't instrument AllocaInstr with alignment more than the redzone size	2013-06-26 09:49:52 +00:00
Integer
JitListener
Linker	Extend RemapInstruction and friends to take an optional new parameter, a ValueMaterializer.	2013-05-28 15:17:05 +00:00
MC	[ARMAsmParser] Sort the ARM register lists based on the encoding value, not the	2013-07-01 20:49:23 +00:00
Object	[yaml2obj][ELF] Make symbol table top-level key.	2013-06-22 01:38:00 +00:00
Other	(1) Add ".test" to test/Other/lit.local.cfg, so llvm-cov.test is actually run.	2013-07-01 18:58:53 +00:00
TableGen
tools	readobj: Dump PE/COFF optional records.	2013-06-12 19:10:33 +00:00
Transforms	LoopVectorize: Math functions only read rounding mode	2013-07-01 00:54:44 +00:00
Unit
Verifier
YAMLParser
CMakeLists.txt
lit.cfg	Suppress llvm/test/Other/can-execute.txt on msys bash.	2013-06-26 10:56:44 +00:00
lit.site.cfg.in
Makefile	add polly to check-all	2013-05-20 18:49:15 +00:00
Makefile.tests
TestRunner.sh