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899aec6301
Summary: This commit allows matchSelectPattern to recognize clamp of float arguments in the presence of FMF the same way as already done for integers. This case is a little different though. With integers, given the min/max pattern is recognized, DAGBuilder starts selecting MIN/MAX "automatically". That is not the case for float, because for them only full FMINNAN/FMINNUM/FMAXNAN/FMAXNUM ISD nodes exist and they do care about NaNs. On the other hand, some backends (e.g. X86) have only FMIN/FMAX nodes that do not care about NaNS and the former NAN/NUM nodes are illegal thus selection is not happening. So I decided to do such kind of transformation in IR (InstCombiner) instead of complicating the logic in the backend. Reviewers: spatel, jmolloy, majnemer, efriedma, craig.topper Reviewed By: efriedma Subscribers: hiraditya, javed.absar, n.bozhenov, llvm-commits Patch by Andrei Elovikov <andrei.elovikov@intel.com> Differential Revision: https://reviews.llvm.org/D33186 llvm-svn: 310054
18 lines
609 B
LLVM
18 lines
609 B
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt -S -instcombine < %s | FileCheck %s
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define float @test1(i32 %scale) {
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; CHECK-LABEL: @test1(
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; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i32 [[SCALE:%.*]], 1
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; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i32 [[SCALE]], i32 1
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; CHECK-NEXT: [[TMP3:%.*]] = sitofp i32 [[TMP2]] to float
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; CHECK-NEXT: ret float [[TMP3]]
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;
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%1 = icmp sgt i32 1, %scale
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%2 = select i1 %1, i32 1, i32 %scale
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%3 = sitofp i32 %2 to float
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%4 = icmp sgt i32 %2, 0
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%sel = select i1 %4, float %3, float 0.000000e+00
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ret float %sel
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}
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