Simon Pilgrim 4f05bce9b3 [X86][AVX] Fold CONCAT(HOP(X,Y),HOP(Z,W)) -> HOP(CONCAT(X,Z),CONCAT(Y,W)) for float types ...

We can now enable this for AVX1 targets can now assist with canonicalizeShuffleMaskWithHorizOp cleanup.

There's still a few missed opportunities for merging subvector insert/extracts into shuffles, but they shouldn't cause any regressions now.

2020-08-16 15:00:41 +01:00

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AArch64

[GlobalISel] Enable copy-propagation in post-legalizer combiner.

2020-08-15 13:44:30 -07:00

AMDGPU

AMDGPU: Fix global atomic saddr operand class

2020-08-15 12:12:28 -04:00

ARC

[ARC] Fix CodeGen/ARC/brcc.ll

2020-08-15 19:33:35 -07:00

ARM

[ARM][test] Add more tests of two-part immediates

2020-08-14 23:11:01 +08:00

AVR

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BPF

BPF: add a SimplifyCFG IR pass during generic Scalar/IPO optimization

2020-08-06 13:16:00 -07:00

Generic

[Tests] Be consistent w/definition of statepoint-example

2020-08-14 20:45:48 -07:00

Hexagon

[BPI] Improve static heuristics for integer comparisons

2020-08-13 19:54:27 +02:00

Inputs

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Lanai

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Mips

[BPI] Improve static heuristics for integer comparisons

2020-08-13 19:54:27 +02:00

MIR

AMDGPU: Serialize MFI spill fields

2020-07-28 20:01:57 -04:00

MSP430

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NVPTX

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PowerPC

[AIX] Generate unique module id based on Pid and timestamp

2020-08-14 16:22:50 -04:00

RISCV

[BPI] Improve static heuristics for integer comparisons

2020-08-13 19:54:27 +02:00

SPARC

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SystemZ

[BPI] Improve static heuristics for integer comparisons

2020-08-13 19:54:27 +02:00

Thumb

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Thumb2

Revert "[ARM] Fix IT block generation after Thumb2SizeReduce with -Oz"

2020-08-13 22:40:36 +01:00

VE

[VE] Change to promote i32 AND/OR/XOR operations

2020-08-12 16:23:50 +09:00

WebAssembly

[WebAssembly] Fix FastISel address calculation bug

2020-08-08 15:23:11 -07:00

WinCFGuard

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WinEH

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X86

[X86][AVX] Fold CONCAT(HOP(X,Y),HOP(Z,W)) -> HOP(CONCAT(X,Z),CONCAT(Y,W)) for float types

2020-08-16 15:00:41 +01:00

XCore

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