Marina Yatsina 4f67f6d0b5 [X86] Fix FBLD and FBSTP ... FBLD and FBSTP should receive TBYTE because it is defined as FBLD m80 FBSTP m80 Differential Revision: http://reviews.llvm.org/D11748 llvm-svn: 245553		2015-08-20 11:51:24 +00:00
..
AArch64	[AArch64] Improve short-form diags on long-form Match_InvalidOperand.	2015-08-19 17:40:19 +00:00
AMDGPU	AMDGPU/SI: Use InstAlias instead of MnemonicAlias for VOPC instructions	2015-08-07 22:00:56 +00:00
ARM	Fix a bunch of trivial cases of 'CHECK[^:]*$' in the tests. NFCI	2015-08-10 19:01:27 +00:00
AsmParser	Fix a bunch of trivial cases of 'CHECK[^:]*$' in the tests. NFCI	2015-08-10 19:01:27 +00:00
COFF	Revert "Centralize the information about which object format we are using."	2015-08-14 15:48:41 +00:00
Disassembler	[mips][microMIPS] Implement DDIV, DMOD, DDIVU and DMODU instructions	2015-08-18 14:40:43 +00:00
ELF	Convert tests under MC/ELF from macho-dump to llvm-readobj.	2015-08-14 15:16:37 +00:00
Hexagon	[Hexagon] Reapply r239097 with tests corrected for shuffling and duplexing.	2015-06-05 16:00:11 +00:00
MachO	[MC] Convert another bunch of tests from macho-dump to llvm-readobj.	2015-08-18 16:05:13 +00:00
Markup
Mips	[mips] Expand JAL instructions when PIC is enabled.	2015-08-18 16:18:09 +00:00
PowerPC	Scalar to vector conversions using direct moves	2015-08-13 17:40:44 +00:00
Sparc	[Sparc]: asm-only support for the ldstub instruction.	2015-08-19 19:30:57 +00:00
SystemZ	[SystemZ] Add z13 vector facility and MC support	2015-05-05 19:23:40 +00:00
X86	[X86] Fix FBLD and FBSTP	2015-08-20 11:51:24 +00:00