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e7d626ae4a
Registers E[A-D]X, E[SD]I, E[BS]P, and EIP have 16-bit subregisters that cover the low halves of these registers. This change adds artificial subregisters for the high halves in order to differentiate (in terms of register units) between the 32- and the low 16-bit registers. This patch contains parts that aim to preserve the calculated register pressure. This is in order to preserve the current codegen (minimize the impact of this patch). The approach of having artificial subregisters could be used to fix PR23423, but the pressure calculation would need to be changed. Differential Revision: https://reviews.llvm.org/D43353 llvm-svn: 328016
21 lines
676 B
LLVM
21 lines
676 B
LLVM
; RUN: llc -enable-ipra -print-regusage -o /dev/null 2>&1 < %s | FileCheck %s
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target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
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target triple = "x86_64-apple-macosx10.12.0"
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; Verify that bar does not clobber anything
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; CHECK-NOT: bar Clobbered Registers:{{.+}}
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; CHECK: bar Clobbered Registers:
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define void @bar() #0 {
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ret void
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}
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; Verifies that inline assembly is correctly handled by giving a list of clobbered registers
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; CHECK: foo Clobbered Registers: $ah $al $ax $ch $cl $cx $di $dil $eax $ecx $edi $hax $hcx $hdi $rax $rcx $rdi
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define void @foo() #0 {
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call void asm sideeffect "", "~{eax},~{ecx},~{edi}"() #0
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ret void
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}
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attributes #0 = { nounwind }
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