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33300d58ab
The code comments didn't match the code logic, and we didn't actually distinguish the fake unary (not/neg/fneg) operators from arguments. Adding another level to the weighting scheme provides more structure and can help simplify the pattern matching in InstCombine and other places. I fixed regressions that would have shown up from this change in: rL290067 rL290127 But that doesn't mean there are no pattern-matching logic holes left; some combines may just be missing regression tests. Should fix: https://llvm.org/bugs/show_bug.cgi?id=28296 Differential Revision: https://reviews.llvm.org/D27933 llvm-svn: 294049
240 lines
7.6 KiB
LLVM
240 lines
7.6 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -instcombine -S | FileCheck %s
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target datalayout = "n8:16:32:64"
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; Eliminating the casts in this testcase (by narrowing the AND operation)
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; allows instcombine to realize the function always returns false.
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define i1 @test1(i32 %A, i32 %B) {
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; CHECK-LABEL: @test1(
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; CHECK-NEXT: ret i1 false
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;
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%C1 = icmp slt i32 %A, %B
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%ELIM1 = zext i1 %C1 to i32
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%C2 = icmp sgt i32 %A, %B
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%ELIM2 = zext i1 %C2 to i32
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%C3 = and i32 %ELIM1, %ELIM2
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%ELIM3 = trunc i32 %C3 to i1
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ret i1 %ELIM3
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}
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; The next 6 (3 logic ops * (scalar+vector)) tests show potential cases for narrowing a bitwise logic op.
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define i32 @shrink_xor(i64 %a) {
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; CHECK-LABEL: @shrink_xor(
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; CHECK-NEXT: [[TMP1:%.*]] = trunc i64 %a to i32
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; CHECK-NEXT: [[TRUNC:%.*]] = xor i32 [[TMP1]], 1
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; CHECK-NEXT: ret i32 [[TRUNC]]
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;
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%xor = xor i64 %a, 1
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%trunc = trunc i64 %xor to i32
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ret i32 %trunc
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}
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; Vectors (with splat constants) should get the same transform.
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define <2 x i32> @shrink_xor_vec(<2 x i64> %a) {
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; CHECK-LABEL: @shrink_xor_vec(
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; CHECK-NEXT: [[TMP1:%.*]] = trunc <2 x i64> %a to <2 x i32>
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; CHECK-NEXT: [[TRUNC:%.*]] = xor <2 x i32> [[TMP1]], <i32 2, i32 2>
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; CHECK-NEXT: ret <2 x i32> [[TRUNC]]
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;
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%xor = xor <2 x i64> %a, <i64 2, i64 2>
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%trunc = trunc <2 x i64> %xor to <2 x i32>
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ret <2 x i32> %trunc
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}
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; Source and dest types are not in the datalayout.
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define i3 @shrink_or(i6 %a) {
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; CHECK-LABEL: @shrink_or(
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; CHECK-NEXT: [[TMP1:%.*]] = trunc i6 %a to i3
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; CHECK-NEXT: [[TRUNC:%.*]] = or i3 [[TMP1]], 1
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; CHECK-NEXT: ret i3 [[TRUNC]]
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;
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%or = or i6 %a, 33
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%trunc = trunc i6 %or to i3
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ret i3 %trunc
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}
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; Vectors (with non-splat constants) should get the same transform.
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define <2 x i8> @shrink_or_vec(<2 x i16> %a) {
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; CHECK-LABEL: @shrink_or_vec(
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; CHECK-NEXT: [[TMP1:%.*]] = trunc <2 x i16> %a to <2 x i8>
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; CHECK-NEXT: [[TRUNC:%.*]] = or <2 x i8> [[TMP1]], <i8 -1, i8 0>
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; CHECK-NEXT: ret <2 x i8> [[TRUNC]]
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;
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%or = or <2 x i16> %a, <i16 -1, i16 256>
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%trunc = trunc <2 x i16> %or to <2 x i8>
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ret <2 x i8> %trunc
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}
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; We discriminate against weird types.
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define i31 @shrink_and(i64 %a) {
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; CHECK-LABEL: @shrink_and(
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; CHECK-NEXT: [[AND:%.*]] = and i64 %a, 42
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; CHECK-NEXT: [[TRUNC:%.*]] = trunc i64 [[AND]] to i31
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; CHECK-NEXT: ret i31 [[TRUNC]]
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;
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%and = and i64 %a, 42
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%trunc = trunc i64 %and to i31
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ret i31 %trunc
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}
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; Chop the top of the constant(s) if needed.
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define <2 x i32> @shrink_and_vec(<2 x i33> %a) {
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; CHECK-LABEL: @shrink_and_vec(
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; CHECK-NEXT: [[TMP1:%.*]] = trunc <2 x i33> %a to <2 x i32>
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; CHECK-NEXT: [[TRUNC:%.*]] = and <2 x i32> [[TMP1]], <i32 0, i32 6>
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; CHECK-NEXT: ret <2 x i32> [[TRUNC]]
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;
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%and = and <2 x i33> %a, <i33 4294967296, i33 6>
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%trunc = trunc <2 x i33> %and to <2 x i32>
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ret <2 x i32> %trunc
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}
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; FIXME:
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; This is based on an 'any_of' loop construct.
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; By narrowing the phi and logic op, we simplify away the zext and the final icmp.
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define i1 @searchArray1(i32 %needle, i32* %haystack) {
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; CHECK-LABEL: @searchArray1(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br label [[LOOP:%.*]]
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; CHECK: loop:
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; CHECK-NEXT: [[INDVAR:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[INDVAR_NEXT:%.*]], [[LOOP]] ]
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; CHECK-NEXT: [[FOUND:%.*]] = phi i8 [ 0, [[ENTRY]] ], [ [[OR:%.*]], [[LOOP]] ]
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; CHECK-NEXT: [[TMP0:%.*]] = sext i32 [[INDVAR]] to i64
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; CHECK-NEXT: [[IDX:%.*]] = getelementptr i32, i32* [[HAYSTACK:%.*]], i64 [[TMP0]]
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; CHECK-NEXT: [[LD:%.*]] = load i32, i32* [[IDX]], align 4
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; CHECK-NEXT: [[CMP1:%.*]] = icmp eq i32 [[LD]], [[NEEDLE:%.*]]
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; CHECK-NEXT: [[ZEXT:%.*]] = zext i1 [[CMP1]] to i8
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; CHECK-NEXT: [[OR]] = or i8 [[FOUND]], [[ZEXT]]
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; CHECK-NEXT: [[INDVAR_NEXT]] = add i32 [[INDVAR]], 1
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; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i32 [[INDVAR_NEXT]], 1000
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; CHECK-NEXT: br i1 [[EXITCOND]], label [[EXIT:%.*]], label [[LOOP]]
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; CHECK: exit:
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; CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i8 [[OR]], 0
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; CHECK-NEXT: ret i1 [[TOBOOL]]
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;
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entry:
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br label %loop
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loop:
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%indvar = phi i32 [ 0, %entry ], [ %indvar.next, %loop ]
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%found = phi i8 [ 0, %entry ], [ %or, %loop ]
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%idx = getelementptr i32, i32* %haystack, i32 %indvar
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%ld = load i32, i32* %idx
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%cmp1 = icmp eq i32 %ld, %needle
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%zext = zext i1 %cmp1 to i8
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%or = or i8 %found, %zext
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%indvar.next = add i32 %indvar, 1
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%exitcond = icmp eq i32 %indvar.next, 1000
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br i1 %exitcond, label %exit, label %loop
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exit:
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%tobool = icmp ne i8 %or, 0
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ret i1 %tobool
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}
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; FIXME:
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; This is based on an 'all_of' loop construct.
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; By narrowing the phi and logic op, we simplify away the zext and the final icmp.
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define i1 @searchArray2(i32 %hay, i32* %haystack) {
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; CHECK-LABEL: @searchArray2(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br label [[LOOP:%.*]]
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; CHECK: loop:
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; CHECK-NEXT: [[INDVAR:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INDVAR_NEXT:%.*]], [[LOOP]] ]
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; CHECK-NEXT: [[FOUND:%.*]] = phi i8 [ 1, [[ENTRY]] ], [ [[AND:%.*]], [[LOOP]] ]
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; CHECK-NEXT: [[IDX:%.*]] = getelementptr i32, i32* [[HAYSTACK:%.*]], i64 [[INDVAR]]
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; CHECK-NEXT: [[LD:%.*]] = load i32, i32* [[IDX]], align 4
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; CHECK-NEXT: [[CMP1:%.*]] = icmp eq i32 [[LD]], [[HAY:%.*]]
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; CHECK-NEXT: [[ZEXT:%.*]] = zext i1 [[CMP1]] to i8
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; CHECK-NEXT: [[AND]] = and i8 [[FOUND]], [[ZEXT]]
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; CHECK-NEXT: [[INDVAR_NEXT]] = add i64 [[INDVAR]], 1
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; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVAR_NEXT]], 1000
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; CHECK-NEXT: br i1 [[EXITCOND]], label [[EXIT:%.*]], label [[LOOP]]
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; CHECK: exit:
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; CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i8 [[AND]], 0
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; CHECK-NEXT: ret i1 [[TOBOOL]]
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;
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entry:
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br label %loop
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loop:
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%indvar = phi i64 [ 0, %entry ], [ %indvar.next, %loop ]
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%found = phi i8 [ 1, %entry ], [ %and, %loop ]
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%idx = getelementptr i32, i32* %haystack, i64 %indvar
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%ld = load i32, i32* %idx
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%cmp1 = icmp eq i32 %ld, %hay
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%zext = zext i1 %cmp1 to i8
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%and = and i8 %found, %zext
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%indvar.next = add i64 %indvar, 1
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%exitcond = icmp eq i64 %indvar.next, 1000
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br i1 %exitcond, label %exit, label %loop
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exit:
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%tobool = icmp ne i8 %and, 0
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ret i1 %tobool
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}
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; FIXME:
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; Narrowing should work with an 'xor' and is not limited to bool types.
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define i32 @shrinkLogicAndPhi1(i8 %x, i1 %cond) {
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; CHECK-LABEL: @shrinkLogicAndPhi1(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br i1 [[COND:%.*]], label [[IF:%.*]], label [[ENDIF:%.*]]
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; CHECK: if:
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; CHECK-NEXT: br label [[ENDIF]]
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; CHECK: endif:
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; CHECK-NEXT: [[PHI:%.*]] = phi i32 [ 21, [[ENTRY:%.*]] ], [ 33, [[IF]] ]
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; CHECK-NEXT: [[ZEXT:%.*]] = zext i8 [[X:%.*]] to i32
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; CHECK-NEXT: [[LOGIC:%.*]] = xor i32 [[PHI]], [[ZEXT]]
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; CHECK-NEXT: ret i32 [[LOGIC]]
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;
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entry:
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br i1 %cond, label %if, label %endif
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if:
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br label %endif
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endif:
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%phi = phi i32 [ 21, %entry], [ 33, %if ]
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%zext = zext i8 %x to i32
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%logic = xor i32 %phi, %zext
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ret i32 %logic
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}
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; FIXME:
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; Narrowing should work with an 'xor' and is not limited to bool types.
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; Test that commuting the xor operands does not inhibit optimization.
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define i32 @shrinkLogicAndPhi2(i8 %x, i1 %cond) {
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; CHECK-LABEL: @shrinkLogicAndPhi2(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br i1 [[COND:%.*]], label [[IF:%.*]], label [[ENDIF:%.*]]
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; CHECK: if:
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; CHECK-NEXT: br label [[ENDIF]]
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; CHECK: endif:
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; CHECK-NEXT: [[PHI:%.*]] = phi i32 [ 21, [[ENTRY:%.*]] ], [ 33, [[IF]] ]
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; CHECK-NEXT: [[ZEXT:%.*]] = zext i8 [[X:%.*]] to i32
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; CHECK-NEXT: [[LOGIC:%.*]] = xor i32 [[PHI]], [[ZEXT]]
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; CHECK-NEXT: ret i32 [[LOGIC]]
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;
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entry:
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br i1 %cond, label %if, label %endif
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if:
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br label %endif
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endif:
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%phi = phi i32 [ 21, %entry], [ 33, %if ]
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%zext = zext i8 %x to i32
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%logic = xor i32 %zext, %phi
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ret i32 %logic
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}
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