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f0ca422f64
autogenerated. Also update existing test cases which appear to be generated by it and weren't modified (other than addition of the header) by rerunning it. llvm-svn: 253917
107 lines
3.8 KiB
LLVM
107 lines
3.8 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i686-darwin -mattr=+mmx,+sse2 | FileCheck --check-prefix=X32 %s
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; RUN: llc < %s -mtriple=x86_64-darwin -mattr=+mmx,+sse2 | FileCheck --check-prefix=X64 %s
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; If there is no explicit MMX type usage, always promote to XMM.
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define void @test0(<1 x i64>* %x) {
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; X32-LABEL: test0:
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; X32: ## BB#0: ## %entry
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; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X32-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
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; X32-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,2,3]
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; X32-NEXT: movq %xmm0, (%eax)
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; X32-NEXT: retl
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;
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; X64-LABEL: test0:
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; X64: ## BB#0: ## %entry
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; X64-NEXT: movq {{.*#+}} xmm0 = mem[0],zero
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; X64-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,2,3]
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; X64-NEXT: movq %xmm0, (%rdi)
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; X64-NEXT: retq
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entry:
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%tmp2 = load <1 x i64>, <1 x i64>* %x
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%tmp6 = bitcast <1 x i64> %tmp2 to <2 x i32>
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%tmp9 = shufflevector <2 x i32> %tmp6, <2 x i32> undef, <2 x i32> < i32 1, i32 1 >
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%tmp10 = bitcast <2 x i32> %tmp9 to <1 x i64>
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store <1 x i64> %tmp10, <1 x i64>* %x
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ret void
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}
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define void @test1() {
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; X32-LABEL: test1:
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; X32: ## BB#0: ## %entry
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; X32-NEXT: pushl %edi
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; X32-NEXT: Ltmp0:
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; X32-NEXT: .cfi_def_cfa_offset 8
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; X32-NEXT: subl $16, %esp
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; X32-NEXT: Ltmp1:
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; X32-NEXT: .cfi_def_cfa_offset 24
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; X32-NEXT: Ltmp2:
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; X32-NEXT: .cfi_offset %edi, -8
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; X32-NEXT: xorps %xmm0, %xmm0
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; X32-NEXT: movlps %xmm0, (%esp)
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; X32-NEXT: movq (%esp), %mm0
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; X32-NEXT: pshuflw {{.*#+}} xmm0 = mem[0,2,2,3,4,5,6,7]
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; X32-NEXT: pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,6,6,7]
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; X32-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
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; X32-NEXT: movq %xmm0, {{[0-9]+}}(%esp)
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; X32-NEXT: movq {{[0-9]+}}(%esp), %mm1
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; X32-NEXT: xorl %edi, %edi
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; X32-NEXT: maskmovq %mm1, %mm0
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; X32-NEXT: addl $16, %esp
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; X32-NEXT: popl %edi
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; X32-NEXT: retl
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;
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; X64-LABEL: test1:
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; X64: ## BB#0: ## %entry
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; X64-NEXT: xorps %xmm0, %xmm0
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; X64-NEXT: movlps %xmm0, -{{[0-9]+}}(%rsp)
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; X64-NEXT: movq -{{[0-9]+}}(%rsp), %mm0
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; X64-NEXT: pshuflw {{.*#+}} xmm0 = mem[0,2,2,3,4,5,6,7]
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; X64-NEXT: pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,6,6,7]
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; X64-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
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; X64-NEXT: movq %xmm0, -{{[0-9]+}}(%rsp)
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; X64-NEXT: movq -{{[0-9]+}}(%rsp), %mm1
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; X64-NEXT: xorl %edi, %edi
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; X64-NEXT: maskmovq %mm1, %mm0
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; X64-NEXT: retq
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entry:
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%tmp528 = bitcast <8 x i8> zeroinitializer to <2 x i32>
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%tmp529 = and <2 x i32> %tmp528, bitcast (<4 x i16> < i16 -32640, i16 16448, i16 8224, i16 4112 > to <2 x i32>)
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%tmp542 = bitcast <2 x i32> %tmp529 to <4 x i16>
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%tmp543 = add <4 x i16> %tmp542, < i16 0, i16 16448, i16 24672, i16 28784 >
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%tmp555 = bitcast <4 x i16> %tmp543 to <8 x i8>
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%tmp556 = bitcast <8 x i8> %tmp555 to x86_mmx
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%tmp557 = bitcast <8 x i8> zeroinitializer to x86_mmx
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tail call void @llvm.x86.mmx.maskmovq( x86_mmx %tmp557, x86_mmx %tmp556, i8* null)
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ret void
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}
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@tmp_V2i = common global <2 x i32> zeroinitializer
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define void @test2() nounwind {
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; X32-LABEL: test2:
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; X32: ## BB#0: ## %entry
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; X32-NEXT: movl L_tmp_V2i$non_lazy_ptr, %eax
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; X32-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
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; X32-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0,0,1,1]
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; X32-NEXT: movlps %xmm0, (%eax)
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; X32-NEXT: retl
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;
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; X64-LABEL: test2:
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; X64: ## BB#0: ## %entry
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; X64-NEXT: movq _tmp_V2i@{{.*}}(%rip), %rax
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; X64-NEXT: movq {{.*#+}} xmm0 = mem[0],zero
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; X64-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,0,1,1]
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; X64-NEXT: movq %xmm0, (%rax)
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; X64-NEXT: retq
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entry:
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%0 = load <2 x i32>, <2 x i32>* @tmp_V2i, align 8
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%1 = shufflevector <2 x i32> %0, <2 x i32> undef, <2 x i32> zeroinitializer
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store <2 x i32> %1, <2 x i32>* @tmp_V2i, align 8
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ret void
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}
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declare void @llvm.x86.mmx.maskmovq(x86_mmx, x86_mmx, i8*)
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