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b10ff17264
We were using VPBLENDW for v2i64 and VBLENDPD for v4i64. VPBLENDD has better throughput than VPBLENDW on some CPUs so it makes sense to use it when possible. VBLENDPD will probably become VBLENDD during execution domain fixing, but we might as well use integer in isel while we can. This should work around some issues with the domain fixing pass prefering PBLENDW when we start with PBLENDW. There may still be some v8i16 cases that could use PBLENDD. llvm-svn: 355281
70 lines
4.2 KiB
LLVM
70 lines
4.2 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx2 -O0 | FileCheck %s
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define <16 x i64> @pluto(<16 x i64> %arg, <16 x i64> %arg1, <16 x i64> %arg2, <16 x i64> %arg3, <16 x i64> %arg4) {
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; CHECK-LABEL: pluto:
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; CHECK: # %bb.0: # %bb
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; CHECK-NEXT: pushq %rbp
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; CHECK-NEXT: .cfi_def_cfa_offset 16
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; CHECK-NEXT: .cfi_offset %rbp, -16
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; CHECK-NEXT: movq %rsp, %rbp
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; CHECK-NEXT: .cfi_def_cfa_register %rbp
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; CHECK-NEXT: andq $-32, %rsp
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; CHECK-NEXT: subq $320, %rsp # imm = 0x140
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; CHECK-NEXT: vmovaps 240(%rbp), %ymm8
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; CHECK-NEXT: vmovaps 208(%rbp), %ymm9
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; CHECK-NEXT: vmovaps 176(%rbp), %ymm10
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; CHECK-NEXT: vmovaps 144(%rbp), %ymm11
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; CHECK-NEXT: vmovaps 112(%rbp), %ymm12
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; CHECK-NEXT: vmovaps 80(%rbp), %ymm13
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; CHECK-NEXT: vmovaps 48(%rbp), %ymm14
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; CHECK-NEXT: vmovaps 16(%rbp), %ymm15
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; CHECK-NEXT: vpblendd {{.*#+}} ymm2 = ymm6[0,1,2,3,4,5],ymm2[6,7]
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; CHECK-NEXT: vmovaps %xmm9, %xmm6
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; CHECK-NEXT: vmovaps %ymm0, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
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; CHECK-NEXT: # implicit-def: $ymm0
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; CHECK-NEXT: vinserti128 $1, %xmm6, %ymm0, %ymm0
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; CHECK-NEXT: vpalignr {{.*#+}} ymm11 = ymm2[8,9,10,11,12,13,14,15],ymm11[0,1,2,3,4,5,6,7],ymm2[24,25,26,27,28,29,30,31],ymm11[16,17,18,19,20,21,22,23]
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; CHECK-NEXT: vpermq {{.*#+}} ymm11 = ymm11[2,3,2,0]
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; CHECK-NEXT: vpblendd {{.*#+}} ymm0 = ymm11[0,1,2,3],ymm0[4,5],ymm11[6,7]
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; CHECK-NEXT: vmovaps %xmm2, %xmm6
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; CHECK-NEXT: # implicit-def: $ymm2
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; CHECK-NEXT: vinserti128 $1, %xmm6, %ymm2, %ymm2
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; CHECK-NEXT: vextracti128 $1, %ymm7, %xmm6
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; CHECK-NEXT: vmovq {{.*#+}} xmm6 = xmm6[0],zero
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; CHECK-NEXT: # implicit-def: $ymm11
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; CHECK-NEXT: vmovaps %xmm6, %xmm11
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; CHECK-NEXT: vpblendd {{.*#+}} ymm2 = ymm11[0,1,2,3],ymm2[4,5,6,7]
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; CHECK-NEXT: vmovaps %xmm7, %xmm6
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; CHECK-NEXT: vpslldq {{.*#+}} xmm6 = zero,zero,zero,zero,zero,zero,zero,zero,xmm6[0,1,2,3,4,5,6,7]
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; CHECK-NEXT: # implicit-def: $ymm11
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; CHECK-NEXT: vmovaps %xmm6, %xmm11
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; CHECK-NEXT: vpalignr {{.*#+}} ymm9 = ymm9[8,9,10,11,12,13,14,15],ymm5[0,1,2,3,4,5,6,7],ymm9[24,25,26,27,28,29,30,31],ymm5[16,17,18,19,20,21,22,23]
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; CHECK-NEXT: vpermq {{.*#+}} ymm9 = ymm9[0,1,0,3]
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; CHECK-NEXT: vpblendd {{.*#+}} ymm9 = ymm11[0,1,2,3],ymm9[4,5,6,7]
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; CHECK-NEXT: vpblendd {{.*#+}} ymm7 = ymm7[0,1],ymm8[2,3],ymm7[4,5,6,7]
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; CHECK-NEXT: vpermq {{.*#+}} ymm7 = ymm7[2,1,1,3]
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; CHECK-NEXT: vpshufd {{.*#+}} ymm5 = ymm5[0,1,0,1,4,5,4,5]
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; CHECK-NEXT: vpblendd {{.*#+}} ymm5 = ymm7[0,1,2,3,4,5],ymm5[6,7]
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; CHECK-NEXT: vmovaps %ymm1, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
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; CHECK-NEXT: vmovaps %ymm5, %ymm1
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; CHECK-NEXT: vmovaps %ymm3, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
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; CHECK-NEXT: vmovaps %ymm9, %ymm3
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; CHECK-NEXT: vmovaps %ymm10, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
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; CHECK-NEXT: vmovaps %ymm12, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
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; CHECK-NEXT: vmovaps %ymm13, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
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; CHECK-NEXT: vmovaps %ymm14, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
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; CHECK-NEXT: vmovaps %ymm15, {{[-0-9]+}}(%r{{[sb]}}p) # 32-byte Spill
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; CHECK-NEXT: vmovaps %ymm4, (%rsp) # 32-byte Spill
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; CHECK-NEXT: movq %rbp, %rsp
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; CHECK-NEXT: popq %rbp
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; CHECK-NEXT: .cfi_def_cfa %rsp, 8
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; CHECK-NEXT: retq
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bb:
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%tmp = select <16 x i1> <i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 true, i1 true, i1 false, i1 false, i1 false, i1 false>, <16 x i64> %arg, <16 x i64> %arg1
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%tmp5 = select <16 x i1> <i1 true, i1 false, i1 false, i1 true, i1 true, i1 false, i1 false, i1 true, i1 false, i1 true, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false>, <16 x i64> %arg2, <16 x i64> zeroinitializer
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%tmp6 = select <16 x i1> <i1 false, i1 true, i1 true, i1 true, i1 false, i1 false, i1 false, i1 false, i1 true, i1 true, i1 false, i1 false, i1 false, i1 true, i1 true, i1 true>, <16 x i64> %arg3, <16 x i64> %tmp5
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%tmp7 = shufflevector <16 x i64> %tmp, <16 x i64> %tmp6, <16 x i32> <i32 11, i32 18, i32 24, i32 9, i32 14, i32 29, i32 29, i32 6, i32 14, i32 28, i32 8, i32 9, i32 22, i32 12, i32 25, i32 6>
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ret <16 x i64> %tmp7
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}
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