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e8d6d1e081
The MSR instructions can write to the CPSR, but we did not model this fact, so we could emit them in the middle of IT blocks, changing the condition flags for later instructions in the block. The tests use two calls to llvm.write_register.i32 because it is valid to use these instructions at the end of an IT block, which if conversion does do in some cases. With two calls, the first clobbers the flags, so a branch has to be used to make the second one conditional. Differential Revision: http://reviews.llvm.org/D21139 llvm-svn: 272154
56 lines
1.6 KiB
LLVM
56 lines
1.6 KiB
LLVM
; RUN: llc < %s -mtriple=thumbv6m-none-eabi | FileCheck %s --check-prefix=V6M --check-prefix=CHECK
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; RUN: llc < %s -mtriple=thumbv7m-none-eabi | FileCheck %s --check-prefix=V7M --check-prefix=CHECK
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; RUN: llc < %s -mtriple=thumbv7a-none-eabi | FileCheck %s --check-prefix=V7A --check-prefix=CHECK
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; RUN: llc < %s -mtriple=armv7a-none-eabi | FileCheck %s --check-prefix=V7A --check-prefix=CHECK
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target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64"
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target triple = "armv7a-arm-none-eabi"
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define void @test_const(i32 %val) {
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; CHECK-LABEL: test_const:
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entry:
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%cmp = icmp eq i32 %val, 0
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br i1 %cmp, label %write_reg, label %exit
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write_reg:
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tail call void @llvm.write_register.i32(metadata !0, i32 0)
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tail call void @llvm.write_register.i32(metadata !0, i32 0)
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; V6M: msr apsr, {{r[0-9]+}}
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; V6M: msr apsr, {{r[0-9]+}}
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; V7M: msr apsr_nzcvq, {{r[0-9]+}}
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; V7M: msr apsr_nzcvq, {{r[0-9]+}}
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; V7A: msr APSR_nzcvqg, {{r[0-9]+}}
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; V7A: msr APSR_nzcvqg, {{r[0-9]+}}
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br label %exit
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exit:
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ret void
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}
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define void @test_var(i32 %val, i32 %apsr) {
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; CHECK-LABEL: test_var:
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entry:
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%cmp = icmp eq i32 %val, 0
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br i1 %cmp, label %write_reg, label %exit
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write_reg:
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tail call void @llvm.write_register.i32(metadata !0, i32 %apsr)
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tail call void @llvm.write_register.i32(metadata !0, i32 %apsr)
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; V6M: msr apsr, {{r[0-9]+}}
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; V6M: msr apsr, {{r[0-9]+}}
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; V7M: msr apsr_nzcvq, {{r[0-9]+}}
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; V7M: msr apsr_nzcvq, {{r[0-9]+}}
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; V7A: msr APSR_nzcvqg, {{r[0-9]+}}
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; V7A: msr APSR_nzcvqg, {{r[0-9]+}}
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br label %exit
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exit:
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ret void
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}
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declare void @llvm.write_register.i32(metadata, i32)
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!0 = !{!"apsr"}
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