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c168815f4b
Summary: The -mcpu=mips16 option caused the Integrated Assembler to crash because it couldn't figure out the architecture revision number to write to the .MIPS.abiflags section. This CPU definition has been removed because, like microMIPS, MIPS16 is an ASE to a base architecture. Reviewers: vkalintiris Subscribers: rkotler, llvm-commits, dsanders Differential Revision: http://reviews.llvm.org/D13656 llvm-svn: 250407
72 lines
2.3 KiB
LLVM
72 lines
2.3 KiB
LLVM
; RUN: llc -march=mipsel -mattr=mips16 -relocation-model=static < %s | FileCheck %s -check-prefix=CHECK-STATIC16
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@s = global i8 115, align 1
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@c = common global i8 0, align 1
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@.str = private unnamed_addr constant [5 x i8] c"%c \0A\00", align 1
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define void @test(i32 %i) nounwind {
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entry:
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%i.addr = alloca i32, align 4
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store i32 %i, i32* %i.addr, align 4
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%0 = load i32, i32* %i.addr, align 4
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switch i32 %0, label %sw.epilog [
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i32 115, label %sw.bb
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i32 105, label %sw.bb1
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i32 100, label %sw.bb2
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i32 108, label %sw.bb3
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i32 99, label %sw.bb4
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i32 68, label %sw.bb5
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i32 81, label %sw.bb6
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i32 76, label %sw.bb7
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]
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sw.bb: ; preds = %entry
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store i8 115, i8* @c, align 1
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br label %sw.epilog
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sw.bb1: ; preds = %entry
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store i8 105, i8* @c, align 1
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br label %sw.epilog
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sw.bb2: ; preds = %entry
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store i8 100, i8* @c, align 1
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br label %sw.epilog
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sw.bb3: ; preds = %entry
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store i8 108, i8* @c, align 1
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br label %sw.epilog
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sw.bb4: ; preds = %entry
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store i8 99, i8* @c, align 1
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br label %sw.epilog
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sw.bb5: ; preds = %entry
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store i8 68, i8* @c, align 1
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br label %sw.epilog
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sw.bb6: ; preds = %entry
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store i8 81, i8* @c, align 1
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br label %sw.epilog
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sw.bb7: ; preds = %entry
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store i8 76, i8* @c, align 1
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br label %sw.epilog
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sw.epilog: ; preds = %entry, %sw.bb7, %sw.bb6, %sw.bb5, %sw.bb4, %sw.bb3, %sw.bb2, %sw.bb1, %sw.bb
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ret void
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}
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; CHECK-STATIC16: li ${{[0-9]+}}, %hi($JTI{{[0-9]+}}_{{[0-9]+}})
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; CHECK-STATIC16: lw ${{[0-9]+}}, %lo($JTI{{[0-9]+}}_{{[0-9]+}})(${{[0-9]+}})
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; CHECK-STATIC16: $JTI{{[0-9]+}}_{{[0-9]+}}:
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; CHECK-STATIC16: .4byte ($BB0_{{[0-9]+}})
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; CHECK-STATIC16: .4byte ($BB0_{{[0-9]+}})
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; CHECK-STATIC16: .4byte ($BB0_{{[0-9]+}})
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; CHECK-STATIC16: .4byte ($BB0_{{[0-9]+}})
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; CHECK-STATIC16: .4byte ($BB0_{{[0-9]+}})
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; CHECK-STATIC16: .4byte ($BB0_{{[0-9]+}})
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; CHECK-STATIC16: .4byte ($BB0_{{[0-9]+}})
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; CHECK-STATIC16: .4byte ($BB0_{{[0-9]+}})
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; CHECK-STATIC16: .4byte ($BB0_{{[0-9]+}})
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; CHECK-STATIC16: .4byte ($BB0_{{[0-9]+}})
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