Igor Kudrin ddd200c2a0 [ARMInstPrinter] Print the target address of a branch instruction ... This follows other patches that changed printing immediate values of branch instructions to target addresses, see D76580 (x86), D76591 (PPC), D77853 (AArch64). As observing immediate values might sometimes be useful, they are printed as comments for branch instructions. // llvm-objdump -d output (before) 000200b4 <_start>: 200b4: ff ff ff fa blx #-4 <thumb> 000200b8 <thumb>: 200b8: ff f7 fc ef blx #-8 <_start> // llvm-objdump -d output (after) 000200b4 <_start>: 200b4: ff ff ff fa blx 0x200b8 <thumb> @ imm = #-4 000200b8 <thumb>: 200b8: ff f7 fc ef blx 0x200b4 <_start> @ imm = #-8 // GNU objdump -d. 000200b4 <_start>: 200b4: faffffff blx 200b8 <thumb> 000200b8 <thumb>: 200b8: f7ff effc blx 200b4 <_start> Differential Revision: https://reviews.llvm.org/D104701		2021-06-30 16:35:28 +07:00
..
AArch64	[Aarch64] Adding support for Armv9-A Realm Management Extension	2021-06-28 13:45:22 +01:00
AMDGPU	[AMDGPU] Add gfx1035 target	2021-06-24 14:32:41 -04:00
ARC
ARM	[ARMInstPrinter] Print the target address of a branch instruction	2021-06-30 16:35:28 +07:00
Hexagon
Lanai
M68k	[M68k] Implement Disassembler	2021-04-19 22:24:12 +01:00
Mips
MSP430
PowerPC	[PowerPC] Export 16 byte load-store instructions	2021-06-15 01:56:10 +00:00
RISCV
Sparc
SystemZ
WebAssembly	[WebAssembly] Update v128.any_true	2021-04-11 11:13:16 -07:00
X86	[X86] Fix disassembly of x86-64 GDTLS code sequence	2021-02-02 11:35:00 +00:00
XCore