llvm-mirror/unpredictable-SEL-arm.txt at 5138c169b189dd00c854701e12caff38477c9bfc - llvm-mirror - Git.je (Gitea)

RPCS3/llvm-mirror

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Silviu Baranga 5138c169b1 Added the missing bit definition for the 4th bit of the STR (post reg) instruction. It is now set to 0. The patch also sets the unpredictable mask for SEL and SXTB-type instructions.

llvm-svn: 156609

2012-05-11 09:28:27 +00:00

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 # RUN: llvm-mc --disassemble %s -triple=armv7-linux-gnueabi |& FileCheck %s
 # CHECK: potentially undefined
 # CHECK: 0xb4 0x38 0x80 0x06
 xb4 0x38 0x80 0x06