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a19558aa7c
The rules for removing trivially dead stores are a lot less complicated than loads. Since we know the later store post dominates the former and the former dominates the later, unless the former has side effects other than the actual store, we can remove it. One slightly surprising thing is that we can freely remove atomic stores, even if the later one isn't atomic. There's no guarantee the atomic one was every visible. For the moment, we don't handle DSE of ordered atomic stores. We could extend the same chain of reasoning to them, but the catch is we'd then have to model the ordering effect without a store instruction. Since our fences are a stronger than our operation orderings, simple using a fence isn't an obvious win. This arguable calls for a refinement in our fence specification, but that's (much) later work. Differential Revision: http://reviews.llvm.org/D15352 llvm-svn: 255914
260 lines
7.3 KiB
LLVM
260 lines
7.3 KiB
LLVM
; RUN: opt < %s -S -early-cse | FileCheck %s
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; CHECK-LABEL: @test12(
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define i32 @test12(i1 %B, i32* %P1, i32* %P2) {
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%load0 = load i32, i32* %P1
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%1 = load atomic i32, i32* %P2 seq_cst, align 4
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%load1 = load i32, i32* %P1
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%sel = select i1 %B, i32 %load0, i32 %load1
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ret i32 %sel
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; CHECK: load i32, i32* %P1
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; CHECK: load i32, i32* %P1
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}
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; CHECK-LABEL: @test13(
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; atomic to non-atomic forwarding is legal
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define i32 @test13(i1 %B, i32* %P1) {
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%a = load atomic i32, i32* %P1 seq_cst, align 4
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%b = load i32, i32* %P1
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%res = sub i32 %a, %b
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ret i32 %res
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; CHECK: load atomic i32, i32* %P1
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; CHECK: ret i32 0
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}
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; CHECK-LABEL: @test14(
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; atomic to unordered atomic forwarding is legal
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define i32 @test14(i1 %B, i32* %P1) {
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%a = load atomic i32, i32* %P1 seq_cst, align 4
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%b = load atomic i32, i32* %P1 unordered, align 4
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%res = sub i32 %a, %b
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ret i32 %res
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; CHECK: load atomic i32, i32* %P1 seq_cst
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; CHECK-NEXT: ret i32 0
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}
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; CHECK-LABEL: @test15(
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; implementation restriction: can't forward to stonger
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; than unordered
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define i32 @test15(i1 %B, i32* %P1, i32* %P2) {
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%a = load atomic i32, i32* %P1 seq_cst, align 4
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%b = load atomic i32, i32* %P1 seq_cst, align 4
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%res = sub i32 %a, %b
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ret i32 %res
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; CHECK: load atomic i32, i32* %P1
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; CHECK: load atomic i32, i32* %P1
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}
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; CHECK-LABEL: @test16(
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; forwarding non-atomic to atomic is wrong! (However,
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; it would be legal to use the later value in place of the
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; former in this particular example. We just don't
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; do that right now.)
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define i32 @test16(i1 %B, i32* %P1, i32* %P2) {
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%a = load i32, i32* %P1, align 4
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%b = load atomic i32, i32* %P1 unordered, align 4
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%res = sub i32 %a, %b
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ret i32 %res
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; CHECK: load i32, i32* %P1
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; CHECK: load atomic i32, i32* %P1
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}
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; Can't DSE across a full fence
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define void @fence_seq_cst_store(i1 %B, i32* %P1, i32* %P2) {
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; CHECK-LABEL: @fence_seq_cst_store
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; CHECK: store
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; CHECK: store atomic
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; CHECK: store
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store i32 0, i32* %P1, align 4
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store atomic i32 0, i32* %P2 seq_cst, align 4
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store i32 0, i32* %P1, align 4
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ret void
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}
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; Can't DSE across a full fence
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define void @fence_seq_cst(i1 %B, i32* %P1, i32* %P2) {
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; CHECK-LABEL: @fence_seq_cst
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; CHECK: store
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; CHECK: fence seq_cst
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; CHECK: store
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store i32 0, i32* %P1, align 4
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fence seq_cst
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store i32 0, i32* %P1, align 4
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ret void
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}
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; Can't DSE across a full fence
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define void @fence_asm_sideeffect(i1 %B, i32* %P1, i32* %P2) {
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; CHECK-LABEL: @fence_asm_sideeffect
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; CHECK: store
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; CHECK: call void asm sideeffect
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; CHECK: store
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store i32 0, i32* %P1, align 4
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call void asm sideeffect "", ""()
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store i32 0, i32* %P1, align 4
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ret void
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}
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; Can't DSE across a full fence
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define void @fence_asm_memory(i1 %B, i32* %P1, i32* %P2) {
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; CHECK-LABEL: @fence_asm_memory
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; CHECK: store
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; CHECK: call void asm
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; CHECK: store
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store i32 0, i32* %P1, align 4
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call void asm "", "~{memory}"()
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store i32 0, i32* %P1, align 4
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ret void
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}
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; Can't remove a volatile load
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define i32 @volatile_load(i1 %B, i32* %P1, i32* %P2) {
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%a = load i32, i32* %P1, align 4
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%b = load volatile i32, i32* %P1, align 4
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%res = sub i32 %a, %b
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ret i32 %res
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; CHECK-LABEL: @volatile_load
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; CHECK: load i32, i32* %P1
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; CHECK: load volatile i32, i32* %P1
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}
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; Can't remove redundant volatile loads
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define i32 @redundant_volatile_load(i1 %B, i32* %P1, i32* %P2) {
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%a = load volatile i32, i32* %P1, align 4
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%b = load volatile i32, i32* %P1, align 4
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%res = sub i32 %a, %b
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ret i32 %res
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; CHECK-LABEL: @redundant_volatile_load
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; CHECK: load volatile i32, i32* %P1
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; CHECK: load volatile i32, i32* %P1
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; CHECK: sub
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}
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; Can't DSE a volatile store
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define void @volatile_store(i1 %B, i32* %P1, i32* %P2) {
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; CHECK-LABEL: @volatile_store
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; CHECK: store volatile
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; CHECK: store
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store volatile i32 0, i32* %P1, align 4
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store i32 3, i32* %P1, align 4
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ret void
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}
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; Can't DSE a redundant volatile store
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define void @redundant_volatile_store(i1 %B, i32* %P1, i32* %P2) {
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; CHECK-LABEL: @redundant_volatile_store
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; CHECK: store volatile
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; CHECK: store volatile
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store volatile i32 0, i32* %P1, align 4
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store volatile i32 0, i32* %P1, align 4
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ret void
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}
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; Can value forward from volatiles
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define i32 @test20(i1 %B, i32* %P1, i32* %P2) {
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%a = load volatile i32, i32* %P1, align 4
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%b = load i32, i32* %P1, align 4
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%res = sub i32 %a, %b
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ret i32 %res
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; CHECK-LABEL: @test20
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; CHECK: load volatile i32, i32* %P1
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; CHECK: ret i32 0
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}
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; Can DSE a non-volatile store in favor of a volatile one
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; currently a missed optimization
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define void @test21(i1 %B, i32* %P1, i32* %P2) {
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; CHECK-LABEL: @test21
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; CHECK: store
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; CHECK: store volatile
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store i32 0, i32* %P1, align 4
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store volatile i32 3, i32* %P1, align 4
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ret void
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}
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; Can DSE a normal store in favor of a unordered one
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define void @test22(i1 %B, i32* %P1, i32* %P2) {
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; CHECK-LABEL: @test22
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; CHECK-NEXT: store atomic
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store i32 0, i32* %P1, align 4
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store atomic i32 3, i32* %P1 unordered, align 4
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ret void
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}
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; Can also DSE a unordered store in favor of a normal one
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define void @test23(i1 %B, i32* %P1, i32* %P2) {
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; CHECK-LABEL: @test23
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; CHECK-NEXT: store i32 0
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store atomic i32 3, i32* %P1 unordered, align 4
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store i32 0, i32* %P1, align 4
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ret void
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}
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; As an implementation limitation, can't remove ordered stores
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; Note that we could remove the earlier store if we could
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; represent the required ordering.
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define void @test24(i1 %B, i32* %P1, i32* %P2) {
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; CHECK-LABEL: @test24
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; CHECK-NEXT: store atomic
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; CHECK-NEXT: store i32 0
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store atomic i32 3, i32* %P1 release, align 4
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store i32 0, i32* %P1, align 4
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ret void
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}
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; Can't remove volatile stores - each is independently observable and
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; the count of such stores is an observable program side effect.
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define void @test25(i1 %B, i32* %P1, i32* %P2) {
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; CHECK-LABEL: @test25
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; CHECK-NEXT: store volatile
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; CHECK-NEXT: store volatile
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store volatile i32 3, i32* %P1, align 4
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store volatile i32 0, i32* %P1, align 4
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ret void
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}
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; Can DSE a unordered store in favor of a unordered one
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define void @test26(i1 %B, i32* %P1, i32* %P2) {
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; CHECK-LABEL: @test26
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; CHECK-NEXT: store atomic i32 3, i32* %P1 unordered, align 4
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; CHECK-NEXT: ret
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store atomic i32 0, i32* %P1 unordered, align 4
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store atomic i32 3, i32* %P1 unordered, align 4
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ret void
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}
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; Can DSE a unordered store in favor of a ordered one,
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; but current don't due to implementation limits
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define void @test27(i1 %B, i32* %P1, i32* %P2) {
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; CHECK-LABEL: @test27
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; CHECK-NEXT: store atomic i32 0, i32* %P1 unordered, align 4
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; CHECK-NEXT: store atomic i32 3, i32* %P1 release, align 4
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; CHECK-NEXT: ret
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store atomic i32 0, i32* %P1 unordered, align 4
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store atomic i32 3, i32* %P1 release, align 4
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ret void
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}
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; Can DSE an unordered atomic store in favor of an
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; ordered one, but current don't due to implementation limits
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define void @test28(i1 %B, i32* %P1, i32* %P2) {
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; CHECK-LABEL: @test28
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; CHECK-NEXT: store atomic i32 0, i32* %P1 unordered, align 4
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; CHECK-NEXT: store atomic i32 3, i32* %P1 release, align 4
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; CHECK-NEXT: ret
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store atomic i32 0, i32* %P1 unordered, align 4
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store atomic i32 3, i32* %P1 release, align 4
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ret void
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}
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; As an implementation limitation, can't remove ordered stores
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; see also: @test24
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define void @test29(i1 %B, i32* %P1, i32* %P2) {
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; CHECK-LABEL: @test29
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; CHECK-NEXT: store atomic
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; CHECK-NEXT: store atomic
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store atomic i32 3, i32* %P1 release, align 4
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store atomic i32 0, i32* %P1 unordered, align 4
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ret void
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}
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