1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-21 12:02:58 +02:00
llvm-mirror/test/CodeGen/AMDGPU/llvm.amdgcn.s.getreg.ll
Artem Tamazov 0b6855273a [AMDGPU][llvm-mc] s_getreg/setreg* - Support symbolic names of hardware registers.
Possibility to specify code of hardware register kept.
Disassemble to symbolic name, if name is known.
Tests updated/added.

Differential Revision: http://reviews.llvm.org/D19335

llvm-svn: 267724
2016-04-27 15:17:03 +00:00

17 lines
705 B
LLVM

; RUN: llc -march=amdgcn -mcpu=tahiti -verify-machineinstrs < %s | FileCheck %s
; RUN: llc -mtriple=amdgcn--amdhsa -mcpu=kaveri -verify-machineinstrs < %s | FileCheck %s
; RUN: llc -mtriple=amdgcn--amdhsa -mcpu=fiji -verify-machineinstrs < %s | FileCheck %s
; FUNC-LABEL: {{^}}s_getreg_test:
; CHECK: s_getreg_b32 s{{[0-9]+}}, hwreg(HW_REG_LDS_ALLOC, 8, 23)
define void @s_getreg_test(i32 addrspace(1)* %out) { ; simm16=45574 for lds size.
%lds_size_64dwords = call i32 @llvm.amdgcn.s.getreg(i32 45574) #0
%lds_size_bytes = shl i32 %lds_size_64dwords, 8
store i32 %lds_size_bytes, i32 addrspace(1)* %out
ret void
}
declare i32 @llvm.amdgcn.s.getreg(i32) #0
attributes #0 = { nounwind readonly}