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llvm-mirror/test/CodeGen/AMDGPU/llvm.amdgcn.s.memrealtime.ll
Matt Arsenault 1bcd37150d AMDGPU: Implement readcyclecounter
This matches the behavior of the HSAIL clock instruction.
s_realmemtime is used if the subtarget supports it, and falls
back to s_memtime if not.

Also introduces new intrinsics for each of s_memtime / s_memrealtime.

llvm-svn: 262119
2016-02-27 08:53:46 +00:00

23 lines
717 B
LLVM

; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=VI -check-prefix=GCN %s
declare i64 @llvm.amdgcn.s.memrealtime() #0
; GCN-LABEL: {{^}}test_s_memrealtime:
; GCN-DAG: s_memrealtime s{{\[[0-9]+:[0-9]+\]}}
; GCN-DAG: s_load_dwordx2
; GCN: lgkmcnt
; GCN: buffer_store_dwordx2
; GCN-NOT: lgkmcnt
; GCN: s_memrealtime s{{\[[0-9]+:[0-9]+\]}}
; GCN: buffer_store_dwordx2
define void @test_s_memrealtime(i64 addrspace(1)* %out) #0 {
%cycle0 = call i64 @llvm.amdgcn.s.memrealtime()
store volatile i64 %cycle0, i64 addrspace(1)* %out
%cycle1 = call i64 @llvm.amdgcn.s.memrealtime()
store volatile i64 %cycle1, i64 addrspace(1)* %out
ret void
}
attributes #0 = { nounwind }