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2dfb6d03c5
PeepholeOptimizer cleans up redundant copies, which makes the operand folding more effective. shader-db stats: Totals: SGPRS: 34200 -> 34336 (0.40 %) VGPRS: 22118 -> 21655 (-2.09 %) Code Size: 632144 -> 633460 (0.21 %) bytes LDS: 11 -> 11 (0.00 %) blocks Scratch: 10240 -> 11264 (10.00 %) bytes per wave Max Waves: 8822 -> 8918 (1.09 %) Wait states: 0 -> 0 (0.00 %) Totals from affected shaders: SGPRS: 7704 -> 7840 (1.77 %) VGPRS: 5169 -> 4706 (-8.96 %) Code Size: 234444 -> 235760 (0.56 %) bytes LDS: 2 -> 2 (0.00 %) blocks Scratch: 0 -> 1024 (0.00 %) bytes per wave Max Waves: 1188 -> 1284 (8.08 %) Wait states: 0 -> 0 (0.00 %) Increases: SGPRS: 35 (0.01 %) VGPRS: 1 (0.00 %) Code Size: 59 (0.02 %) LDS: 0 (0.00 %) Scratch: 1 (0.00 %) Max Waves: 48 (0.02 %) Wait states: 0 (0.00 %) Decreases: SGPRS: 26 (0.01 %) VGPRS: 54 (0.02 %) Code Size: 68 (0.03 %) LDS: 0 (0.00 %) Scratch: 0 (0.00 %) Max Waves: 4 (0.00 %) Wait states: 0 (0.00 %) llvm-svn: 266378
62 lines
2.3 KiB
LLVM
62 lines
2.3 KiB
LLVM
; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s
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declare i32 @llvm.amdgcn.workitem.id.x() nounwind readnone
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; SI-LABEL: {{^}}sint_to_fp_i32_to_f64
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; SI: v_cvt_f64_i32_e32
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define void @sint_to_fp_i32_to_f64(double addrspace(1)* %out, i32 %in) {
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%result = sitofp i32 %in to double
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store double %result, double addrspace(1)* %out
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ret void
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}
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; We can't fold the SGPRs into v_cndmask_b32_e64, because it already
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; uses an SGPR (implicit vcc).
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; SI-LABEL: {{^}}sint_to_fp_i1_f64:
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; SI-DAG: v_cmp_eq_i32_e64 vcc,
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; SI-DAG: v_cndmask_b32_e32 v[[SEL:[0-9]+]], 0, v{{[0-9]+}}
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; SI-DAG: v_mov_b32_e32 v[[ZERO:[0-9]+]], 0{{$}}
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; SI: buffer_store_dwordx2 v{{\[}}[[ZERO]]:[[SEL]]{{\]}}
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; SI: s_endpgm
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define void @sint_to_fp_i1_f64(double addrspace(1)* %out, i32 %in) {
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%cmp = icmp eq i32 %in, 0
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%fp = sitofp i1 %cmp to double
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store double %fp, double addrspace(1)* %out, align 4
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ret void
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}
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; SI-LABEL: {{^}}sint_to_fp_i1_f64_load:
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; SI: v_cndmask_b32_e64 [[IRESULT:v[0-9]]], 0, -1
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; SI-NEXT: v_cvt_f64_i32_e32 [[RESULT:v\[[0-9]+:[0-9]\]]], [[IRESULT]]
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; SI: buffer_store_dwordx2 [[RESULT]]
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; SI: s_endpgm
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define void @sint_to_fp_i1_f64_load(double addrspace(1)* %out, i1 %in) {
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%fp = sitofp i1 %in to double
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store double %fp, double addrspace(1)* %out, align 8
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ret void
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}
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; SI-LABEL: @s_sint_to_fp_i64_to_f64
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define void @s_sint_to_fp_i64_to_f64(double addrspace(1)* %out, i64 %in) {
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%result = sitofp i64 %in to double
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store double %result, double addrspace(1)* %out
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ret void
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}
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; SI-LABEL: @v_sint_to_fp_i64_to_f64
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; SI: buffer_load_dwordx2 v{{\[}}[[LO:[0-9]+]]:[[HI:[0-9]+]]{{\]}}
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; SI-DAG: v_cvt_f64_i32_e32 [[HI_CONV:v\[[0-9]+:[0-9]+\]]], v[[HI]]
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; SI-DAG: v_cvt_f64_u32_e32 [[LO_CONV:v\[[0-9]+:[0-9]+\]]], v[[LO]]
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; SI-DAG: v_ldexp_f64 [[LDEXP:v\[[0-9]+:[0-9]+\]]], [[HI_CONV]], 32
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; SI: v_add_f64 [[RESULT:v\[[0-9]+:[0-9]+\]]], [[LDEXP]], [[LO_CONV]]
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; SI: buffer_store_dwordx2 [[RESULT]]
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define void @v_sint_to_fp_i64_to_f64(double addrspace(1)* %out, i64 addrspace(1)* %in) {
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%tid = call i32 @llvm.amdgcn.workitem.id.x() nounwind readnone
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%gep = getelementptr i64, i64 addrspace(1)* %in, i32 %tid
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%val = load i64, i64 addrspace(1)* %gep, align 8
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%result = sitofp i64 %val to double
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store double %result, double addrspace(1)* %out
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ret void
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}
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