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2f13163a84
This adds a second implementation of the AArch64 architecture to LLVM, accessible in parallel via the "arm64" triple. The plan over the coming weeks & months is to merge the two into a single backend, during which time thorough code review should naturally occur. Everything will be easier with the target in-tree though, hence this commit. llvm-svn: 205090
34 lines
731 B
LLVM
34 lines
731 B
LLVM
; RUN: llc < %s -march=arm64 -arm64-neon-syntax=apple | FileCheck %s
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define zeroext i8 @f1(<16 x i8> %a) {
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; CHECK-LABEL: f1:
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; CHECK: umov.b w0, v0[3]
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; CHECK-NEXT: ret
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%vecext = extractelement <16 x i8> %a, i32 3
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ret i8 %vecext
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}
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define zeroext i16 @f2(<4 x i16> %a) {
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; CHECK-LABEL: f2:
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; CHECK: umov.h w0, v0[2]
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; CHECK-NEXT: ret
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%vecext = extractelement <4 x i16> %a, i32 2
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ret i16 %vecext
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}
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define i32 @f3(<2 x i32> %a) {
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; CHECK-LABEL: f3:
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; CHECK: umov.s w0, v0[1]
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; CHECK-NEXT: ret
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%vecext = extractelement <2 x i32> %a, i32 1
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ret i32 %vecext
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}
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define i64 @f4(<2 x i64> %a) {
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; CHECK-LABEL: f4:
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; CHECK: umov.d x0, v0[1]
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; CHECK-NEXT: ret
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%vecext = extractelement <2 x i64> %a, i32 1
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ret i64 %vecext
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}
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