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5f6f8101d5
integer and floating-point opcodes, introducing FAdd, FSub, and FMul. For now, the AsmParser, BitcodeReader, and IRBuilder all preserve backwards compatability, and the Core LLVM APIs preserve backwards compatibility for IR producers. Most front-ends won't need to change immediately. This implements the first step of the plan outlined here: http://nondot.org/sabre/LLVMNotes/IntegerOverflow.txt llvm-svn: 72897
20 lines
814 B
LLVM
20 lines
814 B
LLVM
; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2,-sse41 | grep movss | count 1
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; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2,-sse41 | not grep pinsrw
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define void @test(<4 x float>* %F, i32 %I) {
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%tmp = load <4 x float>* %F ; <<4 x float>> [#uses=1]
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%f = sitofp i32 %I to float ; <float> [#uses=1]
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%tmp1 = insertelement <4 x float> %tmp, float %f, i32 0 ; <<4 x float>> [#uses=2]
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%tmp18 = fadd <4 x float> %tmp1, %tmp1 ; <<4 x float>> [#uses=1]
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store <4 x float> %tmp18, <4 x float>* %F
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ret void
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}
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define void @test2(<4 x float>* %F, i32 %I, float %g) {
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%tmp = load <4 x float>* %F ; <<4 x float>> [#uses=1]
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%f = sitofp i32 %I to float ; <float> [#uses=1]
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%tmp1 = insertelement <4 x float> %tmp, float %f, i32 2 ; <<4 x float>> [#uses=1]
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store <4 x float> %tmp1, <4 x float>* %F
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ret void
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}
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