Craig Topper 5d2f58cc3e [SelectionDAG] Use known ones to provide a better bound for the known zeros for CTTZ/CTLZ operations. ... This is the SelectionDAG version of D32521. If know where at least one 1 is located in the input to these intrinsics we can place an upper bound on the number of bits needed to represent the count and thus increase the number of known zeros in the output. I think we can also refine this further for CTTZ_UNDEF/CTLZ_UNDEF by assuming that the answer will never be BitWidth. I've left this out for now because it caused other test failures across multiple targets. Usually because of turning ADD into OR based on this new information. I'll fix CTPOP in a future patch. Differential Revision: https://reviews.llvm.org/D32692 llvm-svn: 301806		2017-05-01 16:08:06 +00:00
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AArch64	[StackMaps] Increase the size of the "location size" field	2017-04-28 04:48:42 +00:00
AMDGPU	AMDGPU: Fix copies from physical registers in SIFixSGPRCopies	2017-04-29 01:26:34 +00:00
ARM	[ARM] GlobalISel: Tighten test. NFC	2017-04-28 07:50:47 +00:00
AVR	[AVR] Implement non-constant bit rotations	2017-05-01 09:48:55 +00:00
BPF	[bpf] add bigendian support to disassembler	2017-04-28 16:51:01 +00:00
Generic
Hexagon	[RDF] Correctly calculate lane masks for defs	2017-04-28 21:57:53 +00:00
Inputs
Lanai
Mips	[mips][microMIPS] Adding code size reduction pass for MicroMIPS	2017-04-27 13:10:48 +00:00
MIR
MSP430	[MSP430] Fix PR32769: Select8 and Select16 need to have SR in Uses.	2017-04-26 00:33:59 +00:00
NVPTX
PowerPC	[StackMaps] Increase the size of the "location size" field	2017-04-28 04:48:42 +00:00
SPARC	Don't emit CFI instructions at the end of a function	2017-04-24 18:45:59 +00:00
SystemZ	[SystemZ] Update kill-flag in splitMove().	2017-04-24 12:40:28 +00:00
Thumb	[ARM] ScheduleDAGRRList::DelayForLiveRegsBottomUp must consider OptionalDefs	2017-04-23 06:58:08 +00:00
Thumb2
WebAssembly
WinEH
X86	[SelectionDAG] Use known ones to provide a better bound for the known zeros for CTTZ/CTLZ operations.	2017-05-01 16:08:06 +00:00
XCore