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mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-26 04:32:44 +01:00
llvm-mirror/lib/Target/Alpha
Chris Lattner 52395de322 move createAlphaLLRPPass out of addAssemblyEmitter to make Alpha
more like other targets.

llvm-svn: 75839
2009-07-15 21:40:24 +00:00
..
AsmPrinter Reapply TargetRegistry refactoring commits. 2009-07-15 20:24:03 +00:00
TargetInfo Add TargetInfo libraries for all targets. 2009-07-15 06:35:19 +00:00
Alpha.h Have asm printers use formatted_raw_ostream directly to avoid a 2009-07-14 20:18:05 +00:00
Alpha.td
AlphaBranchSelector.cpp
AlphaCodeEmitter.cpp llvm_unreachable->llvm_unreachable(0), LLVM_UNREACHABLE->llvm_unreachable. 2009-07-14 16:55:14 +00:00
AlphaInstrFormats.td
AlphaInstrInfo.cpp llvm_unreachable->llvm_unreachable(0), LLVM_UNREACHABLE->llvm_unreachable. 2009-07-14 16:55:14 +00:00
AlphaInstrInfo.h
AlphaInstrInfo.td
AlphaISelDAGToDAG.cpp Move EVER MORE stuff over to LLVMContext. 2009-07-14 23:09:55 +00:00
AlphaISelLowering.cpp llvm_unreachable->llvm_unreachable(0), LLVM_UNREACHABLE->llvm_unreachable. 2009-07-14 16:55:14 +00:00
AlphaISelLowering.h
AlphaJITInfo.cpp llvm_unreachable->llvm_unreachable(0), LLVM_UNREACHABLE->llvm_unreachable. 2009-07-14 16:55:14 +00:00
AlphaJITInfo.h
AlphaLLRP.cpp
AlphaMachineFunctionInfo.h
AlphaRegisterInfo.cpp llvm_unreachable->llvm_unreachable(0), LLVM_UNREACHABLE->llvm_unreachable. 2009-07-14 16:55:14 +00:00
AlphaRegisterInfo.h
AlphaRegisterInfo.td
AlphaRelocations.h
AlphaSchedule.td
AlphaSubtarget.cpp
AlphaSubtarget.h
AlphaTargetAsmInfo.cpp
AlphaTargetAsmInfo.h
AlphaTargetMachine.cpp move createAlphaLLRPPass out of addAssemblyEmitter to make Alpha 2009-07-15 21:40:24 +00:00
AlphaTargetMachine.h Reapply TargetRegistry refactoring commits. 2009-07-15 20:24:03 +00:00
CMakeLists.txt
Makefile Add TargetInfo libraries for all targets. 2009-07-15 06:35:19 +00:00
README.txt

***

add gcc builtins for alpha instructions


***

custom expand byteswap into nifty 
extract/insert/mask byte/word/longword/quadword low/high
sequences

***

see if any of the extract/insert/mask operations can be added

***

match more interesting things for cmovlbc cmovlbs (move if low bit clear/set)

***

lower srem and urem

remq(i,j):  i - (j * divq(i,j)) if j != 0
remqu(i,j): i - (j * divqu(i,j)) if j != 0
reml(i,j):  i - (j * divl(i,j)) if j != 0
remlu(i,j): i - (j * divlu(i,j)) if j != 0

***

add crazy vector instructions (MVI):

(MIN|MAX)(U|S)(B8|W4) min and max, signed and unsigned, byte and word
PKWB, UNPKBW pack/unpack word to byte
PKLB UNPKBL pack/unpack long to byte
PERR pixel error (sum accross bytes of bytewise abs(i8v8 a - i8v8 b))

cmpbytes bytewise cmpeq of i8v8 a and i8v8 b (not part of MVI extentions)

this has some good examples for other operations that can be synthesised well 
from these rather meager vector ops (such as saturating add).
http://www.alphalinux.org/docs/MVI-full.html