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1d52f2e8fe
If we lower a v2i64 shuffle to PSHUFD, we currently clamp undef elements to 0, (elements 0,1 of the v4i32) which can result in the shuffle referencing more elements of the source vector than expected, affecting later shuffle combines and KnownBits/SimplifyDemanded calls. By ensuring we widen the undef mask element we allow getV4X86ShuffleImm8 to use inline elements as the default, which are more likely to fold.
239 lines
6.9 KiB
LLVM
239 lines
6.9 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=CHECK --check-prefix=AVX
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; RUN: llc < %s -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefix=CHECK --check-prefix=AVX512
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define <8 x float> @sitofp00(<8 x i32> %a) nounwind {
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; CHECK-LABEL: sitofp00:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vcvtdq2ps %ymm0, %ymm0
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; CHECK-NEXT: retq
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%b = sitofp <8 x i32> %a to <8 x float>
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ret <8 x float> %b
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}
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define <8 x i32> @fptosi00(<8 x float> %a) nounwind {
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; CHECK-LABEL: fptosi00:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vcvttps2dq %ymm0, %ymm0
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; CHECK-NEXT: retq
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%b = fptosi <8 x float> %a to <8 x i32>
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ret <8 x i32> %b
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}
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define <4 x double> @sitofp01(<4 x i32> %a) {
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; CHECK-LABEL: sitofp01:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vcvtdq2pd %xmm0, %ymm0
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; CHECK-NEXT: retq
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%b = sitofp <4 x i32> %a to <4 x double>
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ret <4 x double> %b
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}
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define <8 x float> @sitofp02(<8 x i16> %a) {
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; AVX-LABEL: sitofp02:
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; AVX: # %bb.0:
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; AVX-NEXT: vpmovsxwd %xmm0, %xmm1
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; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,2,3]
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; AVX-NEXT: vpmovsxwd %xmm0, %xmm0
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; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
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; AVX-NEXT: vcvtdq2ps %ymm0, %ymm0
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; AVX-NEXT: retq
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;
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; AVX512-LABEL: sitofp02:
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; AVX512: # %bb.0:
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; AVX512-NEXT: vpmovsxwd %xmm0, %ymm0
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; AVX512-NEXT: vcvtdq2ps %ymm0, %ymm0
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; AVX512-NEXT: retq
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%b = sitofp <8 x i16> %a to <8 x float>
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ret <8 x float> %b
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}
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define <4 x i32> @fptosi01(<4 x double> %a) {
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; CHECK-LABEL: fptosi01:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vcvttpd2dq %ymm0, %xmm0
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; CHECK-NEXT: vzeroupper
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; CHECK-NEXT: retq
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%b = fptosi <4 x double> %a to <4 x i32>
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ret <4 x i32> %b
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}
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define <8 x float> @fptrunc00(<8 x double> %b) nounwind {
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; AVX-LABEL: fptrunc00:
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; AVX: # %bb.0:
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; AVX-NEXT: vcvtpd2ps %ymm0, %xmm0
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; AVX-NEXT: vcvtpd2ps %ymm1, %xmm1
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; AVX-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
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; AVX-NEXT: retq
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;
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; AVX512-LABEL: fptrunc00:
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; AVX512: # %bb.0:
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; AVX512-NEXT: vcvtpd2ps %zmm0, %ymm0
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; AVX512-NEXT: retq
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%a = fptrunc <8 x double> %b to <8 x float>
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ret <8 x float> %a
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}
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define <4 x float> @fptrunc01(<2 x double> %a0, <4 x float> %a1) nounwind {
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; CHECK-LABEL: fptrunc01:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vcvtsd2ss %xmm0, %xmm1, %xmm0
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; CHECK-NEXT: retq
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%ext = extractelement <2 x double> %a0, i32 0
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%cvt = fptrunc double %ext to float
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%res = insertelement <4 x float> %a1, float %cvt, i32 0
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ret <4 x float> %res
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}
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define <4 x double> @fpext00(<4 x float> %b) nounwind {
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; CHECK-LABEL: fpext00:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vcvtps2pd %xmm0, %ymm0
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; CHECK-NEXT: retq
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%a = fpext <4 x float> %b to <4 x double>
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ret <4 x double> %a
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}
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define <2 x double> @fpext01(<2 x double> %a0, <4 x float> %a1) nounwind {
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; CHECK-LABEL: fpext01:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vcvtss2sd %xmm1, %xmm0, %xmm0
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; CHECK-NEXT: retq
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%ext = extractelement <4 x float> %a1, i32 0
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%cvt = fpext float %ext to double
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%res = insertelement <2 x double> %a0, double %cvt, i32 0
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ret <2 x double> %res
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}
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define double @funcA(i64* nocapture %e) nounwind uwtable readonly ssp {
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; CHECK-LABEL: funcA:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vcvtsi2sdq (%rdi), %xmm0, %xmm0
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; CHECK-NEXT: retq
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%tmp1 = load i64, i64* %e, align 8
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%conv = sitofp i64 %tmp1 to double
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ret double %conv
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}
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define double @funcB(i32* nocapture %e) nounwind uwtable readonly ssp {
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; CHECK-LABEL: funcB:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vcvtsi2sdl (%rdi), %xmm0, %xmm0
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; CHECK-NEXT: retq
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%tmp1 = load i32, i32* %e, align 4
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%conv = sitofp i32 %tmp1 to double
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ret double %conv
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}
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define float @funcC(i32* nocapture %e) nounwind uwtable readonly ssp {
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; CHECK-LABEL: funcC:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vcvtsi2ssl (%rdi), %xmm0, %xmm0
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; CHECK-NEXT: retq
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%tmp1 = load i32, i32* %e, align 4
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%conv = sitofp i32 %tmp1 to float
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ret float %conv
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}
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define float @funcD(i64* nocapture %e) nounwind uwtable readonly ssp {
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; CHECK-LABEL: funcD:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vcvtsi2ssq (%rdi), %xmm0, %xmm0
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; CHECK-NEXT: retq
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%tmp1 = load i64, i64* %e, align 8
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%conv = sitofp i64 %tmp1 to float
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ret float %conv
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}
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define void @fpext() nounwind uwtable {
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; CHECK-LABEL: fpext:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
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; CHECK-NEXT: vcvtss2sd %xmm0, %xmm0, %xmm0
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; CHECK-NEXT: vmovsd %xmm0, -{{[0-9]+}}(%rsp)
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; CHECK-NEXT: retq
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%f = alloca float, align 4
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%d = alloca double, align 8
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%tmp = load float, float* %f, align 4
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%conv = fpext float %tmp to double
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store double %conv, double* %d, align 8
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ret void
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}
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define double @nearbyint_f64(double %a) {
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; CHECK-LABEL: nearbyint_f64:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vroundsd $12, %xmm0, %xmm0, %xmm0
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; CHECK-NEXT: retq
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%res = call double @llvm.nearbyint.f64(double %a)
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ret double %res
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}
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declare double @llvm.nearbyint.f64(double %p)
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define float @floor_f32(float %a) {
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; CHECK-LABEL: floor_f32:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vroundss $9, %xmm0, %xmm0, %xmm0
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; CHECK-NEXT: retq
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%res = call float @llvm.floor.f32(float %a)
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ret float %res
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}
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declare float @llvm.floor.f32(float %p)
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define float @floor_f32_load(float* %aptr) optsize {
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; CHECK-LABEL: floor_f32_load:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vroundss $9, (%rdi), %xmm0, %xmm0
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; CHECK-NEXT: retq
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%a = load float, float* %aptr
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%res = call float @llvm.floor.f32(float %a)
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ret float %res
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}
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define float @floor_f32_load_pgso(float* %aptr) !prof !14 {
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; CHECK-LABEL: floor_f32_load_pgso:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vroundss $9, (%rdi), %xmm0, %xmm0
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; CHECK-NEXT: retq
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%a = load float, float* %aptr
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%res = call float @llvm.floor.f32(float %a)
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ret float %res
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}
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define double @nearbyint_f64_load(double* %aptr) optsize {
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; CHECK-LABEL: nearbyint_f64_load:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vroundsd $12, (%rdi), %xmm0, %xmm0
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; CHECK-NEXT: retq
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%a = load double, double* %aptr
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%res = call double @llvm.nearbyint.f64(double %a)
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ret double %res
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}
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define double @nearbyint_f64_load_pgso(double* %aptr) !prof !14 {
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; CHECK-LABEL: nearbyint_f64_load_pgso:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vroundsd $12, (%rdi), %xmm0, %xmm0
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; CHECK-NEXT: retq
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%a = load double, double* %aptr
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%res = call double @llvm.nearbyint.f64(double %a)
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ret double %res
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}
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!llvm.module.flags = !{!0}
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!0 = !{i32 1, !"ProfileSummary", !1}
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!1 = !{!2, !3, !4, !5, !6, !7, !8, !9}
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!2 = !{!"ProfileFormat", !"InstrProf"}
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!3 = !{!"TotalCount", i64 10000}
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!4 = !{!"MaxCount", i64 10}
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!5 = !{!"MaxInternalCount", i64 1}
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!6 = !{!"MaxFunctionCount", i64 1000}
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!7 = !{!"NumCounts", i64 3}
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!8 = !{!"NumFunctions", i64 3}
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!9 = !{!"DetailedSummary", !10}
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!10 = !{!11, !12, !13}
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!11 = !{i32 10000, i64 100, i32 1}
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!12 = !{i32 999000, i64 100, i32 1}
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!13 = !{i32 999999, i64 1, i32 2}
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!14 = !{!"function_entry_count", i64 0}
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