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2bcecae492
We already support 8-bits adds in convertToThreeAddress. But we can also support 8-bit OR if the bits are disjoint. We already do this for 16/32/64. Differential Revision: https://reviews.llvm.org/D58863 llvm-svn: 355423
288 lines
8.1 KiB
LLVM
288 lines
8.1 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s --check-prefix=X64
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; RUN: llc < %s -mtriple=i686-- | FileCheck %s --check-prefix=X32
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define i32 @sub_zext_cmp_mask_same_size_result(i32 %x) {
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; X64-LABEL: sub_zext_cmp_mask_same_size_result:
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; X64: # %bb.0:
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; X64-NEXT: # kill: def $edi killed $edi def $rdi
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; X64-NEXT: andl $1, %edi
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; X64-NEXT: leal -28(%rdi), %eax
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; X64-NEXT: retq
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;
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; X32-LABEL: sub_zext_cmp_mask_same_size_result:
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; X32: # %bb.0:
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; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X32-NEXT: andl $1, %eax
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; X32-NEXT: orl $-28, %eax
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; X32-NEXT: retl
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%a = and i32 %x, 1
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%c = icmp eq i32 %a, 0
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%z = zext i1 %c to i32
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%r = sub i32 -27, %z
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ret i32 %r
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}
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define i32 @sub_zext_cmp_mask_wider_result(i8 %x) {
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; X64-LABEL: sub_zext_cmp_mask_wider_result:
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; X64: # %bb.0:
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; X64-NEXT: # kill: def $edi killed $edi def $rdi
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; X64-NEXT: andl $1, %edi
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; X64-NEXT: leal 26(%rdi), %eax
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; X64-NEXT: retq
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;
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; X32-LABEL: sub_zext_cmp_mask_wider_result:
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; X32: # %bb.0:
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; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax
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; X32-NEXT: andl $1, %eax
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; X32-NEXT: orl $26, %eax
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; X32-NEXT: retl
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%a = and i8 %x, 1
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%c = icmp eq i8 %a, 0
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%z = zext i1 %c to i32
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%r = sub i32 27, %z
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ret i32 %r
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}
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define i8 @sub_zext_cmp_mask_narrower_result(i32 %x) {
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; X64-LABEL: sub_zext_cmp_mask_narrower_result:
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; X64: # %bb.0:
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; X64-NEXT: # kill: def $edi killed $edi def $rdi
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; X64-NEXT: andb $1, %dil
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; X64-NEXT: leal 46(%rdi), %eax
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; X64-NEXT: # kill: def $al killed $al killed $eax
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; X64-NEXT: retq
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;
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; X32-LABEL: sub_zext_cmp_mask_narrower_result:
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; X32: # %bb.0:
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; X32-NEXT: movb {{[0-9]+}}(%esp), %al
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; X32-NEXT: andb $1, %al
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; X32-NEXT: orb $46, %al
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; X32-NEXT: retl
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%a = and i32 %x, 1
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%c = icmp eq i32 %a, 0
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%z = zext i1 %c to i8
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%r = sub i8 47, %z
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ret i8 %r
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}
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define i8 @add_zext_cmp_mask_same_size_result(i8 %x) {
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; X64-LABEL: add_zext_cmp_mask_same_size_result:
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; X64: # %bb.0:
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; X64-NEXT: movl %edi, %eax
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; X64-NEXT: andb $1, %al
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; X64-NEXT: xorb $27, %al
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; X64-NEXT: # kill: def $al killed $al killed $eax
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; X64-NEXT: retq
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;
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; X32-LABEL: add_zext_cmp_mask_same_size_result:
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; X32: # %bb.0:
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; X32-NEXT: movb {{[0-9]+}}(%esp), %al
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; X32-NEXT: andb $1, %al
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; X32-NEXT: xorb $27, %al
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; X32-NEXT: retl
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%a = and i8 %x, 1
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%c = icmp eq i8 %a, 0
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%z = zext i1 %c to i8
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%r = add i8 %z, 26
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ret i8 %r
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}
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define i32 @add_zext_cmp_mask_wider_result(i8 %x) {
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; X64-LABEL: add_zext_cmp_mask_wider_result:
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; X64: # %bb.0:
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; X64-NEXT: movl %edi, %eax
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; X64-NEXT: andl $1, %eax
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; X64-NEXT: xorl $27, %eax
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; X64-NEXT: retq
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;
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; X32-LABEL: add_zext_cmp_mask_wider_result:
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; X32: # %bb.0:
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; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax
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; X32-NEXT: andl $1, %eax
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; X32-NEXT: xorl $27, %eax
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; X32-NEXT: retl
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%a = and i8 %x, 1
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%c = icmp eq i8 %a, 0
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%z = zext i1 %c to i32
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%r = add i32 %z, 26
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ret i32 %r
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}
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define i8 @add_zext_cmp_mask_narrower_result(i32 %x) {
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; X64-LABEL: add_zext_cmp_mask_narrower_result:
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; X64: # %bb.0:
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; X64-NEXT: movl %edi, %eax
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; X64-NEXT: andb $1, %al
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; X64-NEXT: xorb $43, %al
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; X64-NEXT: # kill: def $al killed $al killed $eax
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; X64-NEXT: retq
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;
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; X32-LABEL: add_zext_cmp_mask_narrower_result:
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; X32: # %bb.0:
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; X32-NEXT: movb {{[0-9]+}}(%esp), %al
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; X32-NEXT: andb $1, %al
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; X32-NEXT: xorb $43, %al
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; X32-NEXT: retl
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%a = and i32 %x, 1
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%c = icmp eq i32 %a, 0
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%z = zext i1 %c to i8
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%r = add i8 %z, 42
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ret i8 %r
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}
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define i32 @low_bit_select_constants_bigger_false_same_size_result(i32 %x) {
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; X64-LABEL: low_bit_select_constants_bigger_false_same_size_result:
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; X64: # %bb.0:
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; X64-NEXT: # kill: def $edi killed $edi def $rdi
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; X64-NEXT: andl $1, %edi
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; X64-NEXT: leal 42(%rdi), %eax
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; X64-NEXT: retq
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;
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; X32-LABEL: low_bit_select_constants_bigger_false_same_size_result:
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; X32: # %bb.0:
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; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X32-NEXT: andl $1, %eax
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; X32-NEXT: orl $42, %eax
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; X32-NEXT: retl
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%a = and i32 %x, 1
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%c = icmp eq i32 %a, 0
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%r = select i1 %c, i32 42, i32 43
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ret i32 %r
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}
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define i64 @low_bit_select_constants_bigger_false_wider_result(i32 %x) {
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; X64-LABEL: low_bit_select_constants_bigger_false_wider_result:
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; X64: # %bb.0:
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; X64-NEXT: # kill: def $edi killed $edi def $rdi
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; X64-NEXT: andl $1, %edi
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; X64-NEXT: leaq 26(%rdi), %rax
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; X64-NEXT: retq
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;
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; X32-LABEL: low_bit_select_constants_bigger_false_wider_result:
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; X32: # %bb.0:
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; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X32-NEXT: andl $1, %eax
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; X32-NEXT: orl $26, %eax
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; X32-NEXT: xorl %edx, %edx
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; X32-NEXT: retl
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%a = and i32 %x, 1
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%c = icmp eq i32 %a, 0
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%r = select i1 %c, i64 26, i64 27
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ret i64 %r
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}
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define i16 @low_bit_select_constants_bigger_false_narrower_result(i32 %x) {
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; X64-LABEL: low_bit_select_constants_bigger_false_narrower_result:
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; X64: # %bb.0:
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; X64-NEXT: # kill: def $edi killed $edi def $rdi
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; X64-NEXT: andl $1, %edi
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; X64-NEXT: leal 36(%rdi), %eax
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; X64-NEXT: # kill: def $ax killed $ax killed $eax
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; X64-NEXT: retq
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;
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; X32-LABEL: low_bit_select_constants_bigger_false_narrower_result:
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; X32: # %bb.0:
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; X32-NEXT: movzwl {{[0-9]+}}(%esp), %eax
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; X32-NEXT: andl $1, %eax
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; X32-NEXT: orl $36, %eax
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; X32-NEXT: # kill: def $ax killed $ax killed $eax
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; X32-NEXT: retl
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%a = and i32 %x, 1
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%c = icmp eq i32 %a, 0
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%r = select i1 %c, i16 36, i16 37
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ret i16 %r
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}
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define i8 @low_bit_select_constants_bigger_true_same_size_result(i8 %x) {
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; X64-LABEL: low_bit_select_constants_bigger_true_same_size_result:
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; X64: # %bb.0:
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; X64-NEXT: movl %edi, %eax
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; X64-NEXT: andb $1, %al
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; X64-NEXT: xorb $-29, %al
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; X64-NEXT: # kill: def $al killed $al killed $eax
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; X64-NEXT: retq
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;
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; X32-LABEL: low_bit_select_constants_bigger_true_same_size_result:
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; X32: # %bb.0:
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; X32-NEXT: movb {{[0-9]+}}(%esp), %al
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; X32-NEXT: andb $1, %al
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; X32-NEXT: xorb $-29, %al
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; X32-NEXT: retl
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%a = and i8 %x, 1
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%c = icmp eq i8 %a, 0
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%r = select i1 %c, i8 227, i8 226
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ret i8 %r
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}
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define i32 @low_bit_select_constants_bigger_true_wider_result(i8 %x) {
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; X64-LABEL: low_bit_select_constants_bigger_true_wider_result:
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; X64: # %bb.0:
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; X64-NEXT: movl %edi, %eax
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; X64-NEXT: andl $1, %eax
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; X64-NEXT: xorl $227, %eax
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; X64-NEXT: retq
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;
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; X32-LABEL: low_bit_select_constants_bigger_true_wider_result:
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; X32: # %bb.0:
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; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax
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; X32-NEXT: andl $1, %eax
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; X32-NEXT: xorl $227, %eax
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; X32-NEXT: retl
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%a = and i8 %x, 1
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%c = icmp eq i8 %a, 0
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%r = select i1 %c, i32 227, i32 226
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ret i32 %r
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}
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define i8 @low_bit_select_constants_bigger_true_narrower_result(i16 %x) {
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; X64-LABEL: low_bit_select_constants_bigger_true_narrower_result:
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; X64: # %bb.0:
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; X64-NEXT: movl %edi, %eax
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; X64-NEXT: andb $1, %al
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; X64-NEXT: xorb $41, %al
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; X64-NEXT: # kill: def $al killed $al killed $eax
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; X64-NEXT: retq
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;
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; X32-LABEL: low_bit_select_constants_bigger_true_narrower_result:
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; X32: # %bb.0:
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; X32-NEXT: movb {{[0-9]+}}(%esp), %al
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; X32-NEXT: andb $1, %al
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; X32-NEXT: xorb $41, %al
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; X32-NEXT: retl
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%a = and i16 %x, 1
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%c = icmp eq i16 %a, 0
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%r = select i1 %c, i8 41, i8 40
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ret i8 %r
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}
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; Truncation hoisting must not occur with opaque constants
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; because that can induce infinite looping.
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define i1 @opaque_constant(i48 %x, i48 %y) {
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; X64-LABEL: opaque_constant:
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; X64: # %bb.0:
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; X64-NEXT: movq %rsi, %rax
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; X64-NEXT: shrq $32, %rdi
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; X64-NEXT: shrq $32, %rax
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; X64-NEXT: xorl %edi, %eax
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; X64-NEXT: andl $1, %eax
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; X64-NEXT: # kill: def $al killed $al killed $rax
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; X64-NEXT: retq
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;
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; X32-LABEL: opaque_constant:
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; X32: # %bb.0:
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; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X32-NEXT: xorl {{[0-9]+}}(%esp), %eax
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; X32-NEXT: andl $1, %eax
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; X32-NEXT: # kill: def $al killed $al killed $eax
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; X32-NEXT: retl
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%andx = and i48 %x, 4294967296
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%andy = and i48 %y, 4294967296
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%cmp1 = icmp ne i48 %andx, 0
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%cmp2 = icmp ne i48 %andy, 0
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%r = xor i1 %cmp1, %cmp2
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ret i1 %r
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}
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