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4bf7d5872e
Upgrade of the IR text tests should be the only thing blocking making typed byval mandatory. Partially done through regex and partially manual.
57 lines
1.8 KiB
LLVM
57 lines
1.8 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mcpu=generic -mtriple=i686-- | FileCheck %s
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%struct.W = type { x86_fp80, x86_fp80 }
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@B = global %struct.W { x86_fp80 0xK4001A000000000000000, x86_fp80 0xK4001C000000000000000 }, align 32
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@.cpx = internal constant %struct.W { x86_fp80 0xK4001E000000000000000, x86_fp80 0xK40028000000000000000 }
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define i32 @main() nounwind {
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; CHECK-LABEL: main:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: pushl %ebx
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; CHECK-NEXT: pushl %edi
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; CHECK-NEXT: pushl %esi
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; CHECK-NEXT: movl .cpx+20, %eax
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; CHECK-NEXT: movl .cpx+16, %ecx
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; CHECK-NEXT: movl .cpx+12, %edx
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; CHECK-NEXT: movl .cpx+8, %esi
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; CHECK-NEXT: movl .cpx+4, %edi
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; CHECK-NEXT: movl .cpx, %ebx
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; CHECK-NEXT: pushl %eax
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; CHECK-NEXT: pushl %ecx
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; CHECK-NEXT: pushl %edx
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; CHECK-NEXT: pushl %esi
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; CHECK-NEXT: pushl %edi
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; CHECK-NEXT: pushl %ebx
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; CHECK-NEXT: pushl $3
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; CHECK-NEXT: calll bar
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; CHECK-NEXT: addl $28, %esp
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; CHECK-NEXT: movl B+20, %eax
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; CHECK-NEXT: movl B+16, %ecx
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; CHECK-NEXT: movl B+12, %edx
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; CHECK-NEXT: movl B+8, %esi
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; CHECK-NEXT: movl B+4, %edi
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; CHECK-NEXT: movl B, %ebx
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; CHECK-NEXT: pushl %eax
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; CHECK-NEXT: pushl %ecx
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; CHECK-NEXT: pushl %edx
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; CHECK-NEXT: pushl %esi
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; CHECK-NEXT: pushl %edi
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; CHECK-NEXT: pushl %ebx
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; CHECK-NEXT: pushl $3
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; CHECK-NEXT: calll baz
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; CHECK-NEXT: addl $28, %esp
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; CHECK-NEXT: popl %esi
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; CHECK-NEXT: popl %edi
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; CHECK-NEXT: popl %ebx
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; CHECK-NEXT: retl
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entry:
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tail call void (i32, ...) @bar( i32 3, %struct.W* byval(%struct.W) @.cpx ) nounwind
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tail call void (i32, ...) @baz( i32 3, %struct.W* byval(%struct.W) @B ) nounwind
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ret i32 undef
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}
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declare void @bar(i32, ...)
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declare void @baz(i32, ...)
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