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c275334e12
I had manually removed unused prefixes from CodeGen/X86 directory for more than 100 tests. I checked the change history for each of them at the beginning, and then I mainly focused on the format since I found all of the unused prefixes were result from either insensible copy or residuum after functional update. I think it's OK to remove the remaining X86 tests by script now. I wrote a rough script which works for me in most tests. I put it in llvm/utils temporarily for review and hope it may help other components owners. The tests in this patch are all generated by the tool and checked by update tool for the autogenerated tests. I skimmed them and checked about 30 tests and didn't find any unexpected changes. Reviewed By: mtrofin, MaskRay Differential Revision: https://reviews.llvm.org/D91496
117 lines
4.1 KiB
LLVM
117 lines
4.1 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK,SSE
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=CHECK,SSE
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2 | FileCheck %s --check-prefixes=CHECK,SSE
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=CHECK,AVX
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,AVX
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=CHECK,AVX
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefixes=CHECK,AVX
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declare i32 @llvm.ssub.sat.i32 (i32, i32)
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declare i64 @llvm.ssub.sat.i64 (i64, i64)
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declare <8 x i16> @llvm.ssub.sat.v8i16(<8 x i16>, <8 x i16>)
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; fold (ssub_sat x, undef) -> 0
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define i32 @combine_undef_i32(i32 %a0) {
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; CHECK-LABEL: combine_undef_i32:
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; CHECK: # %bb.0:
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; CHECK-NEXT: xorl %eax, %eax
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; CHECK-NEXT: retq
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%res = call i32 @llvm.ssub.sat.i32(i32 %a0, i32 undef)
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ret i32 %res
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}
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define <8 x i16> @combine_undef_v8i16(<8 x i16> %a0) {
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; SSE-LABEL: combine_undef_v8i16:
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; SSE: # %bb.0:
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; SSE-NEXT: xorps %xmm0, %xmm0
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; SSE-NEXT: retq
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;
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; AVX-LABEL: combine_undef_v8i16:
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; AVX: # %bb.0:
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; AVX-NEXT: vxorps %xmm0, %xmm0, %xmm0
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; AVX-NEXT: retq
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%res = call <8 x i16> @llvm.ssub.sat.v8i16(<8 x i16> undef, <8 x i16> %a0)
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ret <8 x i16> %res
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}
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; fold (ssub_sat c1, c2) -> c3
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define i32 @combine_constfold_i32() {
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; CHECK-LABEL: combine_constfold_i32:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movl $-2147483547, %eax # imm = 0x80000065
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; CHECK-NEXT: retq
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%res = call i32 @llvm.ssub.sat.i32(i32 100, i32 2147483647)
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ret i32 %res
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}
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define <8 x i16> @combine_constfold_v8i16() {
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; SSE-LABEL: combine_constfold_v8i16:
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; SSE: # %bb.0:
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; SSE-NEXT: movaps {{.*#+}} xmm0 = [65535,2,254,0,65534,65282,32786,2]
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; SSE-NEXT: retq
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;
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; AVX-LABEL: combine_constfold_v8i16:
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; AVX: # %bb.0:
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; AVX-NEXT: vmovaps {{.*#+}} xmm0 = [65535,2,254,0,65534,65282,32786,2]
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; AVX-NEXT: retq
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%res = call <8 x i16> @llvm.ssub.sat.v8i16(<8 x i16> <i16 0, i16 1, i16 255, i16 65535, i16 -1, i16 -255, i16 -32760, i16 1>, <8 x i16> <i16 1, i16 65535, i16 1, i16 65535, i16 1, i16 65535, i16 -10, i16 65535>)
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ret <8 x i16> %res
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}
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define <8 x i16> @combine_constfold_undef_v8i16() {
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; SSE-LABEL: combine_constfold_undef_v8i16:
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; SSE: # %bb.0:
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; SSE-NEXT: movaps {{.*#+}} xmm0 = [0,0,0,0,65534,65282,32786,2]
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; SSE-NEXT: retq
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;
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; AVX-LABEL: combine_constfold_undef_v8i16:
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; AVX: # %bb.0:
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; AVX-NEXT: vmovaps {{.*#+}} xmm0 = [0,0,0,0,65534,65282,32786,2]
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; AVX-NEXT: retq
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%res = call <8 x i16> @llvm.ssub.sat.v8i16(<8 x i16> <i16 undef, i16 1, i16 undef, i16 65535, i16 -1, i16 -255, i16 -32760, i16 1>, <8 x i16> <i16 1, i16 undef, i16 undef, i16 65535, i16 1, i16 65535, i16 -10, i16 65535>)
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ret <8 x i16> %res
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}
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; fold (ssub_sat x, 0) -> x
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define i32 @combine_zero_i32(i32 %a0) {
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; CHECK-LABEL: combine_zero_i32:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movl %edi, %eax
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; CHECK-NEXT: retq
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%1 = call i32 @llvm.ssub.sat.i32(i32 %a0, i32 0)
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ret i32 %1
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}
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define <8 x i16> @combine_zero_v8i16(<8 x i16> %a0) {
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; CHECK-LABEL: combine_zero_v8i16:
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; CHECK: # %bb.0:
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; CHECK-NEXT: retq
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%1 = call <8 x i16> @llvm.ssub.sat.v8i16(<8 x i16> %a0, <8 x i16> zeroinitializer)
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ret <8 x i16> %1
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}
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; fold (ssub_sat x, x) -> 0
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define i32 @combine_self_i32(i32 %a0) {
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; CHECK-LABEL: combine_self_i32:
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; CHECK: # %bb.0:
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; CHECK-NEXT: xorl %eax, %eax
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; CHECK-NEXT: retq
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%1 = call i32 @llvm.ssub.sat.i32(i32 %a0, i32 %a0)
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ret i32 %1
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}
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define <8 x i16> @combine_self_v8i16(<8 x i16> %a0) {
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; SSE-LABEL: combine_self_v8i16:
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; SSE: # %bb.0:
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; SSE-NEXT: xorps %xmm0, %xmm0
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; SSE-NEXT: retq
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;
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; AVX-LABEL: combine_self_v8i16:
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; AVX: # %bb.0:
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; AVX-NEXT: vxorps %xmm0, %xmm0, %xmm0
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; AVX-NEXT: retq
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%1 = call <8 x i16> @llvm.ssub.sat.v8i16(<8 x i16> %a0, <8 x i16> %a0)
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ret <8 x i16> %1
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}
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