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6890636bf7
ANY_EXTEND of v8i8 is marked Custom on AVX512 for handling extends from v8i8. But the type legalization infrastructure will call ReplaceNodeResults for v8i8 results. We should just defer it the default handling instead of asserting in the default of the switch. Fixes PR43509. llvm-svn: 373234
26 lines
1.2 KiB
LLVM
26 lines
1.2 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=skx | FileCheck %s
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define <8 x i8> @foo(<8 x float> %arg) {
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; CHECK-LABEL: foo:
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; CHECK: # %bb.0: # %bb
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; CHECK-NEXT: vcmpgtps {{.*}}(%rip){1to8}, %ymm0, %k0
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; CHECK-NEXT: vpmovm2b %k0, %xmm1
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; CHECK-NEXT: vxorps %xmm2, %xmm2, %xmm2
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; CHECK-NEXT: vcmpltps %ymm2, %ymm0, %k1
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; CHECK-NEXT: vmovdqu8 {{.*}}(%rip), %xmm0 {%k1} {z}
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; CHECK-NEXT: vpand %xmm0, %xmm1, %xmm0
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; CHECK-NEXT: vzeroupper
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; CHECK-NEXT: retq
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bb:
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%tmp = xor <8 x i8> zeroinitializer, <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>
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%tmp1 = fcmp reassoc nsz contract ogt <8 x float> %arg, <float 8.000000e+00, float 8.000000e+00, float 8.000000e+00, float 8.000000e+00, float 8.000000e+00, float 8.000000e+00, float 8.000000e+00, float 8.000000e+00>
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%tmp2 = zext <8 x i1> %tmp1 to <8 x i8>
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%tmp3 = and <8 x i8> %tmp, %tmp2
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%tmp4 = fcmp reassoc nsz contract ogt <8 x float> zeroinitializer, %arg
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%tmp5 = or <8 x i1> zeroinitializer, %tmp4
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%tmp6 = zext <8 x i1> %tmp5 to <8 x i8>
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%tmp7 = and <8 x i8> %tmp3, %tmp6
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ret <8 x i8> %tmp7
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}
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