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835f91f74c
This allows us to generate better code for selecting the fixup to load. Previously when the sign was set we had to load offset 0. And when it was clear we had to load offset 4. This required a testl, setns, zero extend, and finally a mul by 4. By switching the offsets we can just shift the sign bit into the lsb and multiply it by 4.
46 lines
1.3 KiB
LLVM
46 lines
1.3 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i386-apple-macosx10.15.0 -mattr=+cmov | FileCheck %s
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@b = global i32 0, align 4
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@a = global i64 0, align 8
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define double @c() nounwind {
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; CHECK-LABEL: c:
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; CHECK: ## %bb.0: ## %entry
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; CHECK-NEXT: pushl %esi
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; CHECK-NEXT: subl $16, %esp
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; CHECK-NEXT: movl _b, %eax
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; CHECK-NEXT: movl %eax, %ecx
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; CHECK-NEXT: sarl $31, %ecx
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; CHECK-NEXT: movl _a+4, %edx
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; CHECK-NEXT: movl _a, %esi
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; CHECK-NEXT: subl %eax, %esi
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; CHECK-NEXT: sbbl %ecx, %edx
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; CHECK-NEXT: setb %al
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; CHECK-NEXT: movl %esi, (%esp)
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; CHECK-NEXT: movl %edx, {{[0-9]+}}(%esp)
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; CHECK-NEXT: shrl $31, %edx
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; CHECK-NEXT: fildll (%esp)
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; CHECK-NEXT: fadds LCPI0_0(,%edx,4)
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; CHECK-NEXT: fstpl {{[0-9]+}}(%esp)
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; CHECK-NEXT: fldl {{[0-9]+}}(%esp)
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; CHECK-NEXT: fldz
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; CHECK-NEXT: testb %al, %al
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; CHECK-NEXT: fxch %st(1)
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; CHECK-NEXT: fcmovne %st(1), %st
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; CHECK-NEXT: fstp %st(1)
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; CHECK-NEXT: addl $16, %esp
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; CHECK-NEXT: popl %esi
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; CHECK-NEXT: retl
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entry:
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%0 = load i32, i32* @b, align 4
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%conv = sext i32 %0 to i64
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%1 = load i64, i64* @a, align 8
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%cmp = icmp ult i64 %1, %conv
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%sub = sub i64 %1, %conv
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%conv3 = uitofp i64 %sub to double
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%cond = select i1 %cmp, double 0.000000e+00, double %conv3
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ret double %cond
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}
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