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c18bf56926
This patch is a third attempt to properly handle the local-dynamic and global-dynamic TLS models. In my original implementation, calls to __tls_get_addr were hidden from view until the asm-printer phase, at which point the underlying branch-and-link instruction was created with proper relocations. This mostly worked well, but I used some repellent techniques to ensure that the TLS_GET_ADDR nodes at the SD and MI levels correctly received input from GPR3 and produced output into GPR3. This proved to work badly in the presence of multiple TLS variable accesses, with the copies to and from GPR3 being scheduled incorrectly and generally creating havoc. In r221703, I addressed that problem by representing the calls to __tls_get_addr as true calls during instruction lowering. This had the advantage of removing all of the bad hacks and relying on the existing call machinery to properly glue the copies in place. It looked like this was going to be the right way to go. However, as a side effect of the recent discovery of problems with linker optimizations for TLS, we discovered cases of suboptimal code generation with this strategy. The problem comes when tls_get_addr is called for the same address, and there is a resulting CSE opportunity. It turns out that in such cases MachineCSE will common the addis/addi instructions that set up the input value to tls_get_addr, but will not common the calls themselves. MachineCSE does not have any machinery to common idempotent calls. This is perfectly sensible, since presumably this would be done at the IR level, and introducing calls in the back end isn't commonplace. In any case, we end up with two calls to __tls_get_addr when one would suffice, and that isn't good. I presumed that the original design would have allowed commoning of the machine-specific nodes that hid the __tls_get_addr calls, so as suggested by Ulrich Weigand, I went back to that design and cleaned it up so that the copies were properly held together by glue nodes. However, it turned out that this didn't work either...the presence of copies to physical registers kept the machine-specific nodes from being commoned also. All of which leads to the design presented here. This is a return to the original design, except that no attempt is made to introduce copies to and from GPR3 during instruction lowering. Virtual registers are used until prior to register allocation. At that point, a special pass is run that identifies the machine-specific nodes that hide the tls_get_addr calls and introduces the copies to and from GPR3 around them. The register allocator then coalesces these copies away. With this design, MachineCSE succeeds in commoning tls_get_addr calls where possible, and we get nice optimal code generation (better than GCC at the moment, which does not common these calls). One additional problem must be dealt with: After introducing the mentions of the physical register GPR3, the aggressive anti-dependence breaker sees opportunities to improve scheduling by selecting a different register instead. Flags must be used on the instruction descriptions to tell the anti-dependence breaker to keep its hands in its pockets. One thing missing from the original design was recording a definition of the link register on the GET_TLS_ADDR nodes. Doing this was found to be insufficient to force a stack frame to be created, which led to looping behavior because two different LR values were stored at the same address. This appears to have been an oversight in PPCFrameLowering::determineFrameLayout(), which is repaired here. Because MustSaveLR() returns true for calls to builtin_return_address, this changed the expected behavior of test/CodeGen/PowerPC/retaddr2.ll, which now stacks a frame but formerly did not. I've fixed the test case to reflect this. There are existing TLS tests to catch regressions; the checks in test/CodeGen/PowerPC/tls-store2.ll proved to be too restrictive in the face of instruction scheduling with these changes, so I fixed that up. I've added a new test case based on the PrettyStackTrace module that demonstrated the original problem. This checks that we get correct code generation and that CSE of the calls to __get_tls_addr has taken place. llvm-svn: 227976
100 lines
3.1 KiB
C++
100 lines
3.1 KiB
C++
//===-- PPC.h - Top-level interface for PowerPC Target ----------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains the entry points for global functions defined in the LLVM
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// PowerPC back-end.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_POWERPC_PPC_H
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#define LLVM_LIB_TARGET_POWERPC_PPC_H
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#include "MCTargetDesc/PPCMCTargetDesc.h"
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#include <string>
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// GCC #defines PPC on Linux but we use it as our namespace name
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#undef PPC
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namespace llvm {
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class PPCTargetMachine;
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class PassRegistry;
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class FunctionPass;
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class ImmutablePass;
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class MachineInstr;
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class AsmPrinter;
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class MCInst;
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FunctionPass *createPPCCTRLoops(PPCTargetMachine &TM);
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#ifndef NDEBUG
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FunctionPass *createPPCCTRLoopsVerify();
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#endif
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FunctionPass *createPPCEarlyReturnPass();
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FunctionPass *createPPCVSXCopyPass();
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FunctionPass *createPPCVSXFMAMutatePass();
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FunctionPass *createPPCBranchSelectionPass();
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FunctionPass *createPPCISelDag(PPCTargetMachine &TM);
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FunctionPass *createPPCTLSDynamicCallPass();
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void LowerPPCMachineInstrToMCInst(const MachineInstr *MI, MCInst &OutMI,
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AsmPrinter &AP, bool isDarwin);
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void initializePPCVSXFMAMutatePass(PassRegistry&);
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extern char &PPCVSXFMAMutateID;
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namespace PPCII {
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/// Target Operand Flag enum.
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enum TOF {
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//===------------------------------------------------------------------===//
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// PPC Specific MachineOperand flags.
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MO_NO_FLAG,
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/// MO_PLT_OR_STUB - On a symbol operand "FOO", this indicates that the
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/// reference is actually to the "FOO$stub" or "FOO@plt" symbol. This is
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/// used for calls and jumps to external functions on Tiger and earlier, and
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/// for PIC calls on Linux and ELF systems.
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MO_PLT_OR_STUB = 1,
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/// MO_PIC_FLAG - If this bit is set, the symbol reference is relative to
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/// the function's picbase, e.g. lo16(symbol-picbase).
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MO_PIC_FLAG = 2,
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/// MO_NLP_FLAG - If this bit is set, the symbol reference is actually to
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/// the non_lazy_ptr for the global, e.g. lo16(symbol$non_lazy_ptr-picbase).
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MO_NLP_FLAG = 4,
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/// MO_NLP_HIDDEN_FLAG - If this bit is set, the symbol reference is to a
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/// symbol with hidden visibility. This causes a different kind of
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/// non-lazy-pointer to be generated.
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MO_NLP_HIDDEN_FLAG = 8,
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/// The next are not flags but distinct values.
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MO_ACCESS_MASK = 0xf0,
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/// MO_LO, MO_HA - lo16(symbol) and ha16(symbol)
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MO_LO = 1 << 4,
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MO_HA = 2 << 4,
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MO_TPREL_LO = 4 << 4,
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MO_TPREL_HA = 3 << 4,
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/// These values identify relocations on immediates folded
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/// into memory operations.
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MO_DTPREL_LO = 5 << 4,
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MO_TLSLD_LO = 6 << 4,
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MO_TOC_LO = 7 << 4,
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// Symbol for VK_PPC_TLS fixup attached to an ADD instruction
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MO_TLS = 8 << 4
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};
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} // end namespace PPCII
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} // end namespace llvm;
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#endif
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