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llvm-mirror/test/Transforms/HardwareLoops
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Sjoerd Meijer a5cc4d095a [HardwareLoops] llvm.loop.decrement.reg definition 
This is split off from D80316, slightly tightening the definition of overloaded
hardwareloop intrinsic llvm.loop.decrement.reg specifying that both operands
its result have the same type.
2020-05-21 10:48:16 +01:00
..
ARM
[HardwareLoops] llvm.loop.decrement.reg definition
2020-05-21 10:48:16 +01:00
loop-guards.ll
[HardwareLoops] Loop counter guard intrinsic
2019-06-28 07:38:16 +00:00
scalar-while.ll
[HardwareLoops] llvm.loop.decrement.reg definition
2020-05-21 10:48:16 +01:00
unconditional-latch.ll
Revert "[HardwareLoops] Optimisation remarks"
2019-10-16 10:55:06 +00:00
unscevable.ll
[PowerPC] Hardware Loop branch instruction's condition may not be icmp.
2019-07-04 01:51:47 +00:00