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17 lines
424 B
LLVM
17 lines
424 B
LLVM
; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -x86-asm-syntax=intel -enable-x86-fastcc | grep 'mov EDX, 1'
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; check that fastcc is passing stuff in regs.
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; Argument reg passing is disabled due to regalloc issues. FIXME!
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; XFAIL: *
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declare fastcc long %callee(long)
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long %caller() {
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%X = call fastcc long %callee(long 4294967299) ;; (1ULL << 32) + 3
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ret long %X
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}
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fastcc long %caller2(long %X) {
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ret long %X
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}
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