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This patch allows targets to define multiple cost values for each register so that the cost model can be more flexible and better used during the register allocation as per the target requirements. For AMDGPU the VGPR allocation will be more efficient if the register cost can be associated dynamically based on the calling convention. Reviewed By: qcolombet Differential Revision: https://reviews.llvm.org/D86836 |
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.. | ||
Disassembler | ||
MCTargetDesc | ||
TargetInfo | ||
ARC.h | ||
ARC.td | ||
ARCAsmPrinter.cpp | ||
ARCBranchFinalize.cpp | ||
ARCCallingConv.td | ||
ARCExpandPseudos.cpp | ||
ARCFrameLowering.cpp | ||
ARCFrameLowering.h | ||
ARCInstrFormats.td | ||
ARCInstrInfo.cpp | ||
ARCInstrInfo.h | ||
ARCInstrInfo.td | ||
ARCISelDAGToDAG.cpp | ||
ARCISelLowering.cpp | ||
ARCISelLowering.h | ||
ARCMachineFunctionInfo.cpp | ||
ARCMachineFunctionInfo.h | ||
ARCMCInstLower.cpp | ||
ARCMCInstLower.h | ||
ARCOptAddrMode.cpp | ||
ARCRegisterInfo.cpp | ||
ARCRegisterInfo.h | ||
ARCRegisterInfo.td | ||
ARCSubtarget.cpp | ||
ARCSubtarget.h | ||
ARCTargetMachine.cpp | ||
ARCTargetMachine.h | ||
ARCTargetStreamer.h | ||
ARCTargetTransformInfo.h | ||
CMakeLists.txt |