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fb68d2c9e8
This patch fixes a corruption of the stack pointer and several registers in any AVR interrupt with non-empty stack frame. Previously, the callee-saved registers were popped before restoring the stack pointer, causing the pointer math to use the wrong base value while also corrupting the caller's register. This change fixes the code to restore the stack pointer last before exiting the interrupt service routine. https://bugs.llvm.org/show_bug.cgi?id=47253 Reviewed By: dylanmckay Differential Revision: https://reviews.llvm.org/D87735 Patch by Andrew Dona-Couch.
535 lines
18 KiB
C++
535 lines
18 KiB
C++
//===-- AVRFrameLowering.cpp - AVR Frame Information ----------------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains the AVR implementation of TargetFrameLowering class.
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//
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//===----------------------------------------------------------------------===//
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#include "AVRFrameLowering.h"
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#include "AVR.h"
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#include "AVRInstrInfo.h"
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#include "AVRMachineFunctionInfo.h"
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#include "AVRTargetMachine.h"
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#include "MCTargetDesc/AVRMCTargetDesc.h"
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#include "llvm/CodeGen/MachineFrameInfo.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/MachineInstrBuilder.h"
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#include "llvm/CodeGen/MachineRegisterInfo.h"
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#include "llvm/IR/Function.h"
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#include <vector>
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namespace llvm {
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AVRFrameLowering::AVRFrameLowering()
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: TargetFrameLowering(TargetFrameLowering::StackGrowsDown, Align(1), -2) {}
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bool AVRFrameLowering::canSimplifyCallFramePseudos(
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const MachineFunction &MF) const {
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// Always simplify call frame pseudo instructions, even when
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// hasReservedCallFrame is false.
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return true;
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}
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bool AVRFrameLowering::hasReservedCallFrame(const MachineFunction &MF) const {
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// Reserve call frame memory in function prologue under the following
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// conditions:
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// - Y pointer is reserved to be the frame pointer.
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// - The function does not contain variable sized objects.
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const MachineFrameInfo &MFI = MF.getFrameInfo();
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return hasFP(MF) && !MFI.hasVarSizedObjects();
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}
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void AVRFrameLowering::emitPrologue(MachineFunction &MF,
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MachineBasicBlock &MBB) const {
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MachineBasicBlock::iterator MBBI = MBB.begin();
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DebugLoc DL = (MBBI != MBB.end()) ? MBBI->getDebugLoc() : DebugLoc();
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const AVRSubtarget &STI = MF.getSubtarget<AVRSubtarget>();
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const AVRInstrInfo &TII = *STI.getInstrInfo();
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const AVRMachineFunctionInfo *AFI = MF.getInfo<AVRMachineFunctionInfo>();
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bool HasFP = hasFP(MF);
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// Interrupt handlers re-enable interrupts in function entry.
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if (AFI->isInterruptHandler()) {
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BuildMI(MBB, MBBI, DL, TII.get(AVR::BSETs))
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.addImm(0x07)
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.setMIFlag(MachineInstr::FrameSetup);
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}
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// Emit special prologue code to save R1, R0 and SREG in interrupt/signal
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// handlers before saving any other registers.
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if (AFI->isInterruptOrSignalHandler()) {
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BuildMI(MBB, MBBI, DL, TII.get(AVR::PUSHWRr))
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.addReg(AVR::R1R0, RegState::Kill)
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.setMIFlag(MachineInstr::FrameSetup);
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BuildMI(MBB, MBBI, DL, TII.get(AVR::INRdA), AVR::R0)
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.addImm(0x3f)
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.setMIFlag(MachineInstr::FrameSetup);
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BuildMI(MBB, MBBI, DL, TII.get(AVR::PUSHRr))
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.addReg(AVR::R0, RegState::Kill)
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.setMIFlag(MachineInstr::FrameSetup);
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BuildMI(MBB, MBBI, DL, TII.get(AVR::EORRdRr))
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.addReg(AVR::R0, RegState::Define)
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.addReg(AVR::R0, RegState::Kill)
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.addReg(AVR::R0, RegState::Kill)
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.setMIFlag(MachineInstr::FrameSetup);
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}
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// Early exit if the frame pointer is not needed in this function.
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if (!HasFP) {
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return;
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}
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const MachineFrameInfo &MFI = MF.getFrameInfo();
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unsigned FrameSize = MFI.getStackSize() - AFI->getCalleeSavedFrameSize();
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// Skip the callee-saved push instructions.
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while (
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(MBBI != MBB.end()) && MBBI->getFlag(MachineInstr::FrameSetup) &&
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(MBBI->getOpcode() == AVR::PUSHRr || MBBI->getOpcode() == AVR::PUSHWRr)) {
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++MBBI;
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}
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// Update Y with the new base value.
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BuildMI(MBB, MBBI, DL, TII.get(AVR::SPREAD), AVR::R29R28)
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.addReg(AVR::SP)
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.setMIFlag(MachineInstr::FrameSetup);
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// Mark the FramePtr as live-in in every block except the entry.
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for (MachineFunction::iterator I = std::next(MF.begin()), E = MF.end();
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I != E; ++I) {
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I->addLiveIn(AVR::R29R28);
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}
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if (!FrameSize) {
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return;
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}
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// Reserve the necessary frame memory by doing FP -= <size>.
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unsigned Opcode = (isUInt<6>(FrameSize)) ? AVR::SBIWRdK : AVR::SUBIWRdK;
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MachineInstr *MI = BuildMI(MBB, MBBI, DL, TII.get(Opcode), AVR::R29R28)
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.addReg(AVR::R29R28, RegState::Kill)
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.addImm(FrameSize)
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.setMIFlag(MachineInstr::FrameSetup);
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// The SREG implicit def is dead.
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MI->getOperand(3).setIsDead();
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// Write back R29R28 to SP and temporarily disable interrupts.
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BuildMI(MBB, MBBI, DL, TII.get(AVR::SPWRITE), AVR::SP)
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.addReg(AVR::R29R28)
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.setMIFlag(MachineInstr::FrameSetup);
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}
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static void restoreStatusRegister(MachineFunction &MF, MachineBasicBlock &MBB) {
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const AVRMachineFunctionInfo *AFI = MF.getInfo<AVRMachineFunctionInfo>();
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MachineBasicBlock::iterator MBBI = MBB.getLastNonDebugInstr();
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DebugLoc DL = MBBI->getDebugLoc();
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const AVRSubtarget &STI = MF.getSubtarget<AVRSubtarget>();
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const AVRInstrInfo &TII = *STI.getInstrInfo();
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// Emit special epilogue code to restore R1, R0 and SREG in interrupt/signal
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// handlers at the very end of the function, just before reti.
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if (AFI->isInterruptOrSignalHandler()) {
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BuildMI(MBB, MBBI, DL, TII.get(AVR::POPRd), AVR::R0);
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BuildMI(MBB, MBBI, DL, TII.get(AVR::OUTARr))
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.addImm(0x3f)
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.addReg(AVR::R0, RegState::Kill);
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BuildMI(MBB, MBBI, DL, TII.get(AVR::POPWRd), AVR::R1R0);
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}
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}
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void AVRFrameLowering::emitEpilogue(MachineFunction &MF,
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MachineBasicBlock &MBB) const {
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const AVRMachineFunctionInfo *AFI = MF.getInfo<AVRMachineFunctionInfo>();
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// Early exit if the frame pointer is not needed in this function except for
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// signal/interrupt handlers where special code generation is required.
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if (!hasFP(MF) && !AFI->isInterruptOrSignalHandler()) {
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return;
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}
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MachineBasicBlock::iterator MBBI = MBB.getLastNonDebugInstr();
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assert(MBBI->getDesc().isReturn() &&
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"Can only insert epilog into returning blocks");
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DebugLoc DL = MBBI->getDebugLoc();
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const MachineFrameInfo &MFI = MF.getFrameInfo();
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unsigned FrameSize = MFI.getStackSize() - AFI->getCalleeSavedFrameSize();
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const AVRSubtarget &STI = MF.getSubtarget<AVRSubtarget>();
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const AVRInstrInfo &TII = *STI.getInstrInfo();
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// Early exit if there is no need to restore the frame pointer.
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if (!FrameSize) {
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restoreStatusRegister(MF, MBB);
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return;
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}
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// Skip the callee-saved pop instructions.
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while (MBBI != MBB.begin()) {
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MachineBasicBlock::iterator PI = std::prev(MBBI);
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int Opc = PI->getOpcode();
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if (Opc != AVR::POPRd && Opc != AVR::POPWRd && !PI->isTerminator()) {
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break;
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}
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--MBBI;
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}
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unsigned Opcode;
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// Select the optimal opcode depending on how big it is.
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if (isUInt<6>(FrameSize)) {
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Opcode = AVR::ADIWRdK;
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} else {
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Opcode = AVR::SUBIWRdK;
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FrameSize = -FrameSize;
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}
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// Restore the frame pointer by doing FP += <size>.
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MachineInstr *MI = BuildMI(MBB, MBBI, DL, TII.get(Opcode), AVR::R29R28)
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.addReg(AVR::R29R28, RegState::Kill)
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.addImm(FrameSize);
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// The SREG implicit def is dead.
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MI->getOperand(3).setIsDead();
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// Write back R29R28 to SP and temporarily disable interrupts.
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BuildMI(MBB, MBBI, DL, TII.get(AVR::SPWRITE), AVR::SP)
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.addReg(AVR::R29R28, RegState::Kill);
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restoreStatusRegister(MF, MBB);
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}
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// Return true if the specified function should have a dedicated frame
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// pointer register. This is true if the function meets any of the following
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// conditions:
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// - a register has been spilled
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// - has allocas
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// - input arguments are passed using the stack
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//
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// Notice that strictly this is not a frame pointer because it contains SP after
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// frame allocation instead of having the original SP in function entry.
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bool AVRFrameLowering::hasFP(const MachineFunction &MF) const {
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const AVRMachineFunctionInfo *FuncInfo = MF.getInfo<AVRMachineFunctionInfo>();
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return (FuncInfo->getHasSpills() || FuncInfo->getHasAllocas() ||
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FuncInfo->getHasStackArgs());
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}
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bool AVRFrameLowering::spillCalleeSavedRegisters(
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MachineBasicBlock &MBB, MachineBasicBlock::iterator MI,
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ArrayRef<CalleeSavedInfo> CSI, const TargetRegisterInfo *TRI) const {
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if (CSI.empty()) {
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return false;
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}
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unsigned CalleeFrameSize = 0;
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DebugLoc DL = MBB.findDebugLoc(MI);
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MachineFunction &MF = *MBB.getParent();
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const AVRSubtarget &STI = MF.getSubtarget<AVRSubtarget>();
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const TargetInstrInfo &TII = *STI.getInstrInfo();
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AVRMachineFunctionInfo *AVRFI = MF.getInfo<AVRMachineFunctionInfo>();
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for (unsigned i = CSI.size(); i != 0; --i) {
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unsigned Reg = CSI[i - 1].getReg();
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bool IsNotLiveIn = !MBB.isLiveIn(Reg);
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assert(TRI->getRegSizeInBits(*TRI->getMinimalPhysRegClass(Reg)) == 8 &&
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"Invalid register size");
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// Add the callee-saved register as live-in only if it is not already a
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// live-in register, this usually happens with arguments that are passed
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// through callee-saved registers.
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if (IsNotLiveIn) {
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MBB.addLiveIn(Reg);
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}
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// Do not kill the register when it is an input argument.
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BuildMI(MBB, MI, DL, TII.get(AVR::PUSHRr))
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.addReg(Reg, getKillRegState(IsNotLiveIn))
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.setMIFlag(MachineInstr::FrameSetup);
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++CalleeFrameSize;
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}
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AVRFI->setCalleeSavedFrameSize(CalleeFrameSize);
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return true;
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}
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bool AVRFrameLowering::restoreCalleeSavedRegisters(
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MachineBasicBlock &MBB, MachineBasicBlock::iterator MI,
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MutableArrayRef<CalleeSavedInfo> CSI, const TargetRegisterInfo *TRI) const {
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if (CSI.empty()) {
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return false;
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}
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DebugLoc DL = MBB.findDebugLoc(MI);
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const MachineFunction &MF = *MBB.getParent();
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const AVRSubtarget &STI = MF.getSubtarget<AVRSubtarget>();
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const TargetInstrInfo &TII = *STI.getInstrInfo();
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for (const CalleeSavedInfo &CCSI : CSI) {
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unsigned Reg = CCSI.getReg();
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assert(TRI->getRegSizeInBits(*TRI->getMinimalPhysRegClass(Reg)) == 8 &&
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"Invalid register size");
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BuildMI(MBB, MI, DL, TII.get(AVR::POPRd), Reg);
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}
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return true;
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}
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/// Replace pseudo store instructions that pass arguments through the stack with
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/// real instructions.
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static void fixStackStores(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator MI,
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const TargetInstrInfo &TII, Register FP) {
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// Iterate through the BB until we hit a call instruction or we reach the end.
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for (auto I = MI, E = MBB.end(); I != E && !I->isCall();) {
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MachineBasicBlock::iterator NextMI = std::next(I);
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MachineInstr &MI = *I;
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unsigned Opcode = I->getOpcode();
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// Only care of pseudo store instructions where SP is the base pointer.
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if (Opcode != AVR::STDSPQRr && Opcode != AVR::STDWSPQRr) {
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I = NextMI;
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continue;
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}
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assert(MI.getOperand(0).getReg() == AVR::SP &&
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"Invalid register, should be SP!");
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// Replace this instruction with a regular store. Use Y as the base
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// pointer since it is guaranteed to contain a copy of SP.
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unsigned STOpc =
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(Opcode == AVR::STDWSPQRr) ? AVR::STDWPtrQRr : AVR::STDPtrQRr;
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MI.setDesc(TII.get(STOpc));
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MI.getOperand(0).setReg(FP);
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I = NextMI;
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}
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}
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MachineBasicBlock::iterator AVRFrameLowering::eliminateCallFramePseudoInstr(
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MachineFunction &MF, MachineBasicBlock &MBB,
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MachineBasicBlock::iterator MI) const {
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const AVRSubtarget &STI = MF.getSubtarget<AVRSubtarget>();
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const AVRInstrInfo &TII = *STI.getInstrInfo();
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// There is nothing to insert when the call frame memory is allocated during
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// function entry. Delete the call frame pseudo and replace all pseudo stores
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// with real store instructions.
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if (hasReservedCallFrame(MF)) {
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fixStackStores(MBB, MI, TII, AVR::R29R28);
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return MBB.erase(MI);
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}
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DebugLoc DL = MI->getDebugLoc();
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unsigned int Opcode = MI->getOpcode();
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int Amount = TII.getFrameSize(*MI);
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// ADJCALLSTACKUP and ADJCALLSTACKDOWN are converted to adiw/subi
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// instructions to read and write the stack pointer in I/O space.
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if (Amount != 0) {
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assert(getStackAlign() == Align(1) && "Unsupported stack alignment");
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if (Opcode == TII.getCallFrameSetupOpcode()) {
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// Update the stack pointer.
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// In many cases this can be done far more efficiently by pushing the
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// relevant values directly to the stack. However, doing that correctly
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// (in the right order, possibly skipping some empty space for undef
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// values, etc) is tricky and thus left to be optimized in the future.
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BuildMI(MBB, MI, DL, TII.get(AVR::SPREAD), AVR::R31R30).addReg(AVR::SP);
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MachineInstr *New = BuildMI(MBB, MI, DL, TII.get(AVR::SUBIWRdK), AVR::R31R30)
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.addReg(AVR::R31R30, RegState::Kill)
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.addImm(Amount);
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New->getOperand(3).setIsDead();
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BuildMI(MBB, MI, DL, TII.get(AVR::SPWRITE), AVR::SP)
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.addReg(AVR::R31R30, RegState::Kill);
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// Make sure the remaining stack stores are converted to real store
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// instructions.
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fixStackStores(MBB, MI, TII, AVR::R31R30);
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} else {
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assert(Opcode == TII.getCallFrameDestroyOpcode());
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// Note that small stack changes could be implemented more efficiently
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// with a few pop instructions instead of the 8-9 instructions now
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// required.
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// Select the best opcode to adjust SP based on the offset size.
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unsigned addOpcode;
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if (isUInt<6>(Amount)) {
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addOpcode = AVR::ADIWRdK;
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} else {
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addOpcode = AVR::SUBIWRdK;
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Amount = -Amount;
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}
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// Build the instruction sequence.
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BuildMI(MBB, MI, DL, TII.get(AVR::SPREAD), AVR::R31R30).addReg(AVR::SP);
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MachineInstr *New = BuildMI(MBB, MI, DL, TII.get(addOpcode), AVR::R31R30)
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.addReg(AVR::R31R30, RegState::Kill)
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.addImm(Amount);
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New->getOperand(3).setIsDead();
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BuildMI(MBB, MI, DL, TII.get(AVR::SPWRITE), AVR::SP)
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.addReg(AVR::R31R30, RegState::Kill);
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}
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}
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return MBB.erase(MI);
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}
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void AVRFrameLowering::determineCalleeSaves(MachineFunction &MF,
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BitVector &SavedRegs,
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RegScavenger *RS) const {
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TargetFrameLowering::determineCalleeSaves(MF, SavedRegs, RS);
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// If we have a frame pointer, the Y register needs to be saved as well.
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if (hasFP(MF)) {
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SavedRegs.set(AVR::R29);
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SavedRegs.set(AVR::R28);
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}
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}
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/// The frame analyzer pass.
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///
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/// Scans the function for allocas and used arguments
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/// that are passed through the stack.
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struct AVRFrameAnalyzer : public MachineFunctionPass {
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static char ID;
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AVRFrameAnalyzer() : MachineFunctionPass(ID) {}
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bool runOnMachineFunction(MachineFunction &MF) override {
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const MachineFrameInfo &MFI = MF.getFrameInfo();
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AVRMachineFunctionInfo *FuncInfo = MF.getInfo<AVRMachineFunctionInfo>();
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// If there are no fixed frame indexes during this stage it means there
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// are allocas present in the function.
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if (MFI.getNumObjects() != MFI.getNumFixedObjects()) {
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// Check for the type of allocas present in the function. We only care
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// about fixed size allocas so do not give false positives if only
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// variable sized allocas are present.
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for (unsigned i = 0, e = MFI.getObjectIndexEnd(); i != e; ++i) {
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// Variable sized objects have size 0.
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if (MFI.getObjectSize(i)) {
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FuncInfo->setHasAllocas(true);
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break;
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}
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}
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}
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// If there are fixed frame indexes present, scan the function to see if
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// they are really being used.
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if (MFI.getNumFixedObjects() == 0) {
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return false;
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}
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// Ok fixed frame indexes present, now scan the function to see if they
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// are really being used, otherwise we can ignore them.
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for (const MachineBasicBlock &BB : MF) {
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for (const MachineInstr &MI : BB) {
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int Opcode = MI.getOpcode();
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if ((Opcode != AVR::LDDRdPtrQ) && (Opcode != AVR::LDDWRdPtrQ) &&
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(Opcode != AVR::STDPtrQRr) && (Opcode != AVR::STDWPtrQRr)) {
|
|
continue;
|
|
}
|
|
|
|
for (const MachineOperand &MO : MI.operands()) {
|
|
if (!MO.isFI()) {
|
|
continue;
|
|
}
|
|
|
|
if (MFI.isFixedObjectIndex(MO.getIndex())) {
|
|
FuncInfo->setHasStackArgs(true);
|
|
return false;
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
return false;
|
|
}
|
|
|
|
StringRef getPassName() const override { return "AVR Frame Analyzer"; }
|
|
};
|
|
|
|
char AVRFrameAnalyzer::ID = 0;
|
|
|
|
/// Creates instance of the frame analyzer pass.
|
|
FunctionPass *createAVRFrameAnalyzerPass() { return new AVRFrameAnalyzer(); }
|
|
|
|
/// Create the Dynalloca Stack Pointer Save/Restore pass.
|
|
/// Insert a copy of SP before allocating the dynamic stack memory and restore
|
|
/// it in function exit to restore the original SP state. This avoids the need
|
|
/// of reserving a register pair for a frame pointer.
|
|
struct AVRDynAllocaSR : public MachineFunctionPass {
|
|
static char ID;
|
|
AVRDynAllocaSR() : MachineFunctionPass(ID) {}
|
|
|
|
bool runOnMachineFunction(MachineFunction &MF) override {
|
|
// Early exit when there are no variable sized objects in the function.
|
|
if (!MF.getFrameInfo().hasVarSizedObjects()) {
|
|
return false;
|
|
}
|
|
|
|
const AVRSubtarget &STI = MF.getSubtarget<AVRSubtarget>();
|
|
const TargetInstrInfo &TII = *STI.getInstrInfo();
|
|
MachineBasicBlock &EntryMBB = MF.front();
|
|
MachineBasicBlock::iterator MBBI = EntryMBB.begin();
|
|
DebugLoc DL = EntryMBB.findDebugLoc(MBBI);
|
|
|
|
Register SPCopy =
|
|
MF.getRegInfo().createVirtualRegister(&AVR::DREGSRegClass);
|
|
|
|
// Create a copy of SP in function entry before any dynallocas are
|
|
// inserted.
|
|
BuildMI(EntryMBB, MBBI, DL, TII.get(AVR::COPY), SPCopy).addReg(AVR::SP);
|
|
|
|
// Restore SP in all exit basic blocks.
|
|
for (MachineBasicBlock &MBB : MF) {
|
|
// If last instruction is a return instruction, add a restore copy.
|
|
if (!MBB.empty() && MBB.back().isReturn()) {
|
|
MBBI = MBB.getLastNonDebugInstr();
|
|
DL = MBBI->getDebugLoc();
|
|
BuildMI(MBB, MBBI, DL, TII.get(AVR::COPY), AVR::SP)
|
|
.addReg(SPCopy, RegState::Kill);
|
|
}
|
|
}
|
|
|
|
return true;
|
|
}
|
|
|
|
StringRef getPassName() const override {
|
|
return "AVR dynalloca stack pointer save/restore";
|
|
}
|
|
};
|
|
|
|
char AVRDynAllocaSR::ID = 0;
|
|
|
|
/// createAVRDynAllocaSRPass - returns an instance of the dynalloca stack
|
|
/// pointer save/restore pass.
|
|
FunctionPass *createAVRDynAllocaSRPass() { return new AVRDynAllocaSR(); }
|
|
|
|
} // end of namespace llvm
|
|
|