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03368166ea
An upcoming patch D41434, changes the ordering of the matcher table for assembly. This patch corrects the definition of the normal MIPS cvt.d.w not to be available in microMIPS. llvm-svn: 325589
215 lines
10 KiB
ArmAsm
215 lines
10 KiB
ArmAsm
# RUN: llvm-mc %s -triple=mipsel-unknown-linux -show-encoding -show-inst -mcpu=mips32r2 | FileCheck %s --check-prefixes=CHECK,CHECK-32
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# RUN: llvm-mc %s -triple=mips64el-unknown-linux -show-encoding -show-inst -mcpu=mips64r2 | FileCheck %s --check-prefixes=CHECK,CHECK-64
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# Check that the assembler can handle the documented syntax
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# for FPU instructions.
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#------------------------------------------------------------------------------
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# FP aritmetic instructions
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#------------------------------------------------------------------------------
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# CHECK: abs.d $f12, $f14 # encoding: [0x05,0x73,0x20,0x46]
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# CHECK: abs.s $f6, $f7 # encoding: [0x85,0x39,0x00,0x46]
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# CHECK: add.d $f8, $f12, $f14 # encoding: [0x00,0x62,0x2e,0x46]
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# CHECK: add.s $f9, $f6, $f7 # encoding: [0x40,0x32,0x07,0x46]
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# CHECK: floor.w.d $f12, $f14 # encoding: [0x0f,0x73,0x20,0x46]
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# CHECK: floor.w.s $f6, $f7 # encoding: [0x8f,0x39,0x00,0x46]
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# CHECK: ceil.w.d $f12, $f14 # encoding: [0x0e,0x73,0x20,0x46]
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# CHECK: ceil.w.s $f6, $f7 # encoding: [0x8e,0x39,0x00,0x46]
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# CHECK: mul.d $f8, $f12, $f14 # encoding: [0x02,0x62,0x2e,0x46]
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# CHECK: mul.s $f9, $f6, $f7 # encoding: [0x42,0x32,0x07,0x46]
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# CHECK: neg.d $f12, $f14 # encoding: [0x07,0x73,0x20,0x46]
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# CHECK: neg.s $f6, $f7 # encoding: [0x87,0x39,0x00,0x46]
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# CHECK: round.w.d $f12, $f14 # encoding: [0x0c,0x73,0x20,0x46]
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# CHECK: round.w.s $f6, $f7 # encoding: [0x8c,0x39,0x00,0x46]
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# CHECK: sqrt.d $f12, $f14 # encoding: [0x04,0x73,0x20,0x46]
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# CHECK: sqrt.s $f6, $f7 # encoding: [0x84,0x39,0x00,0x46]
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# CHECK: sub.d $f8, $f12, $f14 # encoding: [0x01,0x62,0x2e,0x46]
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# CHECK: sub.s $f9, $f6, $f7 # encoding: [0x41,0x32,0x07,0x46]
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# CHECK: trunc.w.d $f12, $f14 # encoding: [0x0d,0x73,0x20,0x46]
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# CHECK: trunc.w.s $f6, $f7 # encoding: [0x8d,0x39,0x00,0x46]
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abs.d $f12,$f14
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abs.s $f6,$f7
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add.d $f8,$f12,$f14
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add.s $f9,$f6,$f7
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floor.w.d $f12,$f14
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floor.w.s $f6,$f7
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ceil.w.d $f12,$f14
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ceil.w.s $f6,$f7
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mul.d $f8,$f12,$f14
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mul.s $f9,$f6, $f7
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neg.d $f12,$f14
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neg.s $f6,$f7
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round.w.d $f12,$f14
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round.w.s $f6,$f7
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sqrt.d $f12,$f14
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sqrt.s $f6,$f7
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sub.d $f8,$f12,$f14
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sub.s $f9,$f6,$f7
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trunc.w.d $f12,$f14
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trunc.w.s $f6,$f7
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#------------------------------------------------------------------------------
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# FP compare instructions
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#------------------------------------------------------------------------------
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# CHECK: c.eq.d $f12, $f14 # encoding: [0x32,0x60,0x2e,0x46]
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# CHECK: c.eq.s $f6, $f7 # encoding: [0x32,0x30,0x07,0x46]
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# CHECK: c.f.d $f12, $f14 # encoding: [0x30,0x60,0x2e,0x46]
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# CHECK: c.f.s $f6, $f7 # encoding: [0x30,0x30,0x07,0x46]
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# CHECK: c.le.d $f12, $f14 # encoding: [0x3e,0x60,0x2e,0x46]
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# CHECK: c.le.s $f6, $f7 # encoding: [0x3e,0x30,0x07,0x46]
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# CHECK: c.lt.d $f12, $f14 # encoding: [0x3c,0x60,0x2e,0x46]
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# CHECK: c.lt.s $f6, $f7 # encoding: [0x3c,0x30,0x07,0x46]
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# CHECK: c.nge.d $f12, $f14 # encoding: [0x3d,0x60,0x2e,0x46]
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# CHECK: c.nge.s $f6, $f7 # encoding: [0x3d,0x30,0x07,0x46]
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# CHECK: c.ngl.d $f12, $f14 # encoding: [0x3b,0x60,0x2e,0x46]
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# CHECK: c.ngl.s $f6, $f7 # encoding: [0x3b,0x30,0x07,0x46]
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# CHECK: c.ngle.d $f12, $f14 # encoding: [0x39,0x60,0x2e,0x46]
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# CHECK: c.ngle.s $f6, $f7 # encoding: [0x39,0x30,0x07,0x46]
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# CHECK: c.ngt.d $f12, $f14 # encoding: [0x3f,0x60,0x2e,0x46]
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# CHECK: c.ngt.s $f6, $f7 # encoding: [0x3f,0x30,0x07,0x46]
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# CHECK: c.ole.d $f12, $f14 # encoding: [0x36,0x60,0x2e,0x46]
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# CHECK: c.ole.s $f6, $f7 # encoding: [0x36,0x30,0x07,0x46]
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# CHECK: c.olt.d $f12, $f14 # encoding: [0x34,0x60,0x2e,0x46]
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# CHECK: c.olt.s $f6, $f7 # encoding: [0x34,0x30,0x07,0x46]
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# CHECK: c.seq.d $f12, $f14 # encoding: [0x3a,0x60,0x2e,0x46]
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# CHECK: c.seq.s $f6, $f7 # encoding: [0x3a,0x30,0x07,0x46]
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# CHECK: c.sf.d $f12, $f14 # encoding: [0x38,0x60,0x2e,0x46]
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# CHECK: c.sf.s $f6, $f7 # encoding: [0x38,0x30,0x07,0x46]
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# CHECK: c.ueq.d $f12, $f14 # encoding: [0x33,0x60,0x2e,0x46]
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# CHECK: c.ueq.s $f28, $f18 # encoding: [0x33,0xe0,0x12,0x46]
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# CHECK: c.ule.d $f12, $f14 # encoding: [0x37,0x60,0x2e,0x46]
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# CHECK: c.ule.s $f6, $f7 # encoding: [0x37,0x30,0x07,0x46]
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# CHECK: c.ult.d $f12, $f14 # encoding: [0x35,0x60,0x2e,0x46]
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# CHECK: c.ult.s $f6, $f7 # encoding: [0x35,0x30,0x07,0x46]
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# CHECK: c.un.d $f12, $f14 # encoding: [0x31,0x60,0x2e,0x46]
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# CHECK: c.un.s $f6, $f7 # encoding: [0x31,0x30,0x07,0x46]
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c.eq.d $f12,$f14
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c.eq.s $f6,$f7
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c.f.d $f12,$f14
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c.f.s $f6,$f7
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c.le.d $f12,$f14
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c.le.s $f6,$f7
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c.lt.d $f12,$f14
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c.lt.s $f6,$f7
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c.nge.d $f12,$f14
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c.nge.s $f6,$f7
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c.ngl.d $f12,$f14
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c.ngl.s $f6,$f7
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c.ngle.d $f12,$f14
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c.ngle.s $f6,$f7
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c.ngt.d $f12,$f14
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c.ngt.s $f6,$f7
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c.ole.d $f12,$f14
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c.ole.s $f6,$f7
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c.olt.d $f12,$f14
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c.olt.s $f6,$f7
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c.seq.d $f12,$f14
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c.seq.s $f6,$f7
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c.sf.d $f12,$f14
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c.sf.s $f6,$f7
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c.ueq.d $f12,$f14
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c.ueq.s $f28,$f18
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c.ule.d $f12,$f14
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c.ule.s $f6,$f7
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c.ult.d $f12,$f14
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c.ult.s $f6,$f7
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c.un.d $f12,$f14
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c.un.s $f6,$f7
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#------------------------------------------------------------------------------
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# FP convert instructions
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#------------------------------------------------------------------------------
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# CHECK: cvt.d.s $f6, $f7 # encoding: [0xa1,0x39,0x00,0x46]
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# CHECK: cvt.d.w $f12, $f14 # encoding: [0x21,0x73,0x80,0x46]
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# CHECK-32: # <MCInst #{{.*}} CVT_D32_W
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# CHECK-64: # <MCInst #{{.*}} CVT_D64_W
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# CHECK: cvt.s.d $f12, $f14 # encoding: [0x20,0x73,0x20,0x46]
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# CHECK: cvt.s.w $f6, $f7 # encoding: [0xa0,0x39,0x80,0x46]
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# CHECK: cvt.w.d $f12, $f14 # encoding: [0x24,0x73,0x20,0x46]
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# CHECK: cvt.w.s $f6, $f7 # encoding: [0xa4,0x39,0x00,0x46]
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cvt.d.s $f6,$f7
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cvt.d.w $f12,$f14
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cvt.s.d $f12,$f14
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cvt.s.w $f6,$f7
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cvt.w.d $f12,$f14
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cvt.w.s $f6,$f7
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#------------------------------------------------------------------------------
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# FP move instructions
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#------------------------------------------------------------------------------
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# CHECK: bc1f $BB_1 # encoding: [A,A,0x00,0x45]
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# CHECK: # fixup A - offset: 0, value: ($BB_1)-4, kind: fixup_Mips_PC16
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# CHECK: cfc1 $6, $0 # encoding: [0x00,0x00,0x46,0x44]
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# CHECK: ctc1 $10, $31 # encoding: [0x00,0xf8,0xca,0x44]
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# CHECK: mfc1 $6, $f7 # encoding: [0x00,0x38,0x06,0x44]
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# CHECK: mfhi $5 # encoding: [0x10,0x28,0x00,0x00]
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# CHECK: mflo $5 # encoding: [0x12,0x28,0x00,0x00]
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# CHECK: mov.d $f6, $f8 # encoding: [0x86,0x41,0x20,0x46]
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# CHECK: mov.s $f6, $f7 # encoding: [0x86,0x39,0x00,0x46]
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# CHECK: mtc1 $6, $f7 # encoding: [0x00,0x38,0x86,0x44]
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# CHECK: mthi $7 # encoding: [0x11,0x00,0xe0,0x00]
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# CHECK: mtlo $7 # encoding: [0x13,0x00,0xe0,0x00]
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# CHECK: swc1 $f9, 9158($7) # encoding: [0xc6,0x23,0xe9,0xe4]
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# CHECK: mfc0 $6, $7, 0 # encoding: [0x00,0x38,0x06,0x40]
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# CHECK: mtc0 $9, $8, 0 # encoding: [0x00,0x40,0x89,0x40]
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# CHECK: mfc2 $5, $7, 0 # encoding: [0x00,0x38,0x05,0x48]
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# CHECK: mtc2 $9, $4, 0 # encoding: [0x00,0x20,0x89,0x48]
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# CHECK: mfc0 $6, $7, 2 # encoding: [0x02,0x38,0x06,0x40]
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# CHECK: mtc0 $9, $8, 3 # encoding: [0x03,0x40,0x89,0x40]
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# CHECK: mfc2 $5, $7, 4 # encoding: [0x04,0x38,0x05,0x48]
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# CHECK: mtc2 $9, $4, 5 # encoding: [0x05,0x20,0x89,0x48]
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# CHECK: movf $2, $1, $fcc0 # encoding: [0x01,0x10,0x20,0x00]
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# CHECK: movt $2, $1, $fcc0 # encoding: [0x01,0x10,0x21,0x00]
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# CHECK: movt $4, $5, $fcc4 # encoding: [0x01,0x20,0xb1,0x00]
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# CHECK: movf.d $f4, $f6, $fcc2 # encoding: [0x11,0x31,0x28,0x46]
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# CHECK: movf.s $f4, $f6, $fcc5 # encoding: [0x11,0x31,0x14,0x46]
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# CHECK: luxc1 $f0, $6($5) # encoding: [0x05,0x00,0xa6,0x4c]
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# CHECK: suxc1 $f4, $24($5) # encoding: [0x0d,0x20,0xb8,0x4c]
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# CHECK: lwxc1 $f20, $12($14) # encoding: [0x00,0x05,0xcc,0x4d]
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# CHECK: swxc1 $f26, $18($22) # encoding: [0x08,0xd0,0xd2,0x4e]
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# CHECK: mfhc1 $17, $f4 # encoding: [0x00,0x20,0x71,0x44]
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# CHECK: mthc1 $17, $f6 # encoding: [0x00,0x30,0xf1,0x44]
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# CHECK: swc2 $4, 16($sp) # encoding: [0x10,0x00,0xa4,0xeb]
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# CHECK: sdc2 $4, 16($sp) # encoding: [0x10,0x00,0xa4,0xfb]
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# CHECK: lwc2 $11, 12($ra) # encoding: [0x0c,0x00,0xeb,0xcb]
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# CHECK: ldc2 $11, 12($ra) # encoding: [0x0c,0x00,0xeb,0xdb]
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bc1f $fcc0, $BB_1
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cfc1 $a2,$0
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ctc1 $10,$31
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mfc1 $a2,$f7
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mfhi $a1
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mflo $a1
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mov.d $f6,$f8
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mov.s $f6,$f7
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mtc1 $a2,$f7
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mthi $a3
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mtlo $a3
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swc1 $f9,9158($a3)
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mfc0 $6, $7
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mtc0 $9, $8
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mfc2 $5, $7
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mtc2 $9, $4
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mfc0 $6, $7, 2
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mtc0 $9, $8, 3
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mfc2 $5, $7, 4
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mtc2 $9, $4, 5
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movf $2, $1, $fcc0
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movt $2, $1, $fcc0
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movt $4, $5, $fcc4
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movf.d $f4, $f6, $fcc2
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movf.s $f4, $f6, $fcc5
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luxc1 $f0, $a2($a1)
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suxc1 $f4, $t8($a1)
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lwxc1 $f20, $12($14)
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swxc1 $f26, $s2($s6)
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mfhc1 $17, $f4
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mthc1 $17, $f6
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swc2 $4, 16($sp)
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sdc2 $4, 16($sp)
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lwc2 $11, 12($ra)
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ldc2 $11, 12($ra)
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