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Sam Parker 547901a5ad [ARM] MVE Tail Predication
The MVE and LOB extensions of Armv8.1m can be combined to enable
'tail predication' which removes the need for a scalar remainder
loop after vectorization. Lane predication is performed implicitly
via a system register. The effects of predication is described in
Section B5.6.3 of the Armv8.1-m Arch Reference Manual, the key points
being:
- For vector operations that perform reduction across the vector and
  produce a scalar result, whether the value is accumulated or not.
- For non-load instructions, the predicate flags determine if the
  destination register byte is updated with the new value or if the
  previous value is preserved.
- For vector store instructions, whether the store occurs or not.
- For vector load instructions, whether the value that is loaded or
  whether zeros are written to that element of the destination
  register.

This patch implements a pass that takes a hardware loop, containing
masked vector instructions, and converts it something that resembles
an MVE tail predicated loop. Currently, if we had code generation,
we'd generate a loop in which the VCTP would generate the predicate
and VPST would then setup the value of VPR.PO. The loads and stores
would be placed in VPT blocks so this is not tail predication, but
normal VPT predication with the predicate based upon a element
counting induction variable. Further work needs to be done to finally
produce a true tail predicated loop.

Because only the loads and stores are predicated, in both the LLVM IR
and MIR level, we will restrict support to only lane-wise operations
(no horizontal reductions). We will perform a final check on MIR
during loop finalisation too.

Another restriction, specific to MVE, is that all the vector
instructions need operate on the same number of elements. This is
because predication is performed at the byte level and this is set
on entry to the loop, or by the VCTP instead.

Differential Revision: https://reviews.llvm.org/D65884

llvm-svn: 371179
2019-09-06 08:24:41 +00:00
benchmarks
bindings Bump llvm-go to C++14 2019-08-15 10:55:25 +00:00
cmake [CMake] LLVM_COMPILE_FLAGS also applies to C files 2019-09-06 07:12:36 +00:00
docs Docs: Update Community section on homepage 2019-09-05 21:24:47 +00:00
examples [ORCv2] - New Speculate Query Implementation 2019-08-27 18:23:36 +00:00
include [ARM] MVE Tail Predication 2019-09-06 08:24:41 +00:00
lib [ARM] MVE Tail Predication 2019-09-06 08:24:41 +00:00
projects [libc++] Take 2: Integrate the PSTL into libc++ 2019-08-05 18:29:14 +00:00
resources
runtimes
test [ARM] MVE Tail Predication 2019-09-06 08:24:41 +00:00
tools [llvm-readobj][yaml2obj] Support SHT_LLVM_SYMPART, SHT_LLVM_PART_EHDR and SHT_LLVM_PART_PHDR 2019-09-06 00:53:28 +00:00
unittests [MC] Fix undefined behavior in MCInstPrinter::formatHex 2019-09-06 01:13:32 +00:00
utils gn build: Merge r371159 2019-09-06 01:22:13 +00:00
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CMakeLists.txt Revert Autogenerate the shebang lines for tools/opt-viewer 2019-08-27 18:31:29 +00:00
CODE_OWNERS.TXT Update email address in CODE_OWNERS 2019-07-01 16:01:15 +00:00
configure
CREDITS.TXT Update email address. 2019-07-17 07:02:02 +00:00
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