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https://github.com/RPCS3/llvm-mirror.git
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ffa26401ac
This is D77454, except for stores. All the infrastructure work was done for loads, so the remaining changes necessary are relatively small. Differential Revision: https://reviews.llvm.org/D79968
92 lines
3.5 KiB
LLVM
92 lines
3.5 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt -newgvn -S %s | FileCheck %s
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@f = external local_unnamed_addr global i64
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@b = external local_unnamed_addr global i64
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@e = external local_unnamed_addr global i64
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define void @patatino() {
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; CHECK-LABEL: @patatino(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br i1 undef, label [[IF_END24:%.*]], label [[FOR_COND16:%.*]]
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; CHECK: for.cond2thread-pre-split:
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; CHECK-NEXT: br i1 false, label [[FOR_BODY:%.*]], label [[FOR_COND8_PREHEADER:%.*]]
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; CHECK: for.cond8.preheader:
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; CHECK-NEXT: br i1 undef, label [[L1:%.*]], label [[FOR_COND11THREAD_PRE_SPLIT_LR_PH:%.*]]
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; CHECK: for.cond11thread-pre-split.lr.ph:
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; CHECK-NEXT: br label [[L1]]
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; CHECK: for.body:
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; CHECK-NEXT: [[CMP3:%.*]] = icmp ne i64 [[K_2:%.*]], 3
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; CHECK-NEXT: [[CONV4:%.*]] = zext i1 [[CMP3]] to i64
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; CHECK-NEXT: [[TMP0:%.*]] = load i64, i64* @f, align 4
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; CHECK-NEXT: [[OR:%.*]] = or i64 [[TMP0]], [[CONV4]]
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; CHECK-NEXT: store i64 [[OR]], i64* @f, align 4
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; CHECK-NEXT: [[TOBOOL7:%.*]] = icmp ne i64 [[K_2]], 0
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; CHECK-NEXT: br i1 [[TOBOOL7]], label [[FOR_COND2THREAD_PRE_SPLIT:%.*]], label [[LOR_RHS:%.*]]
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; CHECK: lor.rhs:
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; CHECK-NEXT: store i64 1, i64* @b, align 8
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; CHECK-NEXT: br label [[FOR_COND2THREAD_PRE_SPLIT]]
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; CHECK: l1:
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; CHECK-NEXT: [[K_2]] = phi i64 [ undef, [[L1_PREHEADER:%.*]] ], [ 15, [[FOR_COND8_PREHEADER]] ], [ 5, [[FOR_COND11THREAD_PRE_SPLIT_LR_PH]] ]
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; CHECK-NEXT: store i64 7, i64* [[J_3:%.*]], align 4
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; CHECK-NEXT: br label [[FOR_BODY]]
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; CHECK: for.cond16:
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; CHECK-NEXT: [[J_0:%.*]] = phi i64* [ @f, [[ENTRY:%.*]] ], [ undef, [[FOR_COND20:%.*]] ], [ @e, [[FOR_COND16]] ]
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; CHECK-NEXT: br i1 undef, label [[FOR_COND20]], label [[FOR_COND16]]
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; CHECK: for.cond20:
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; CHECK-NEXT: [[J_2:%.*]] = phi i64* [ [[J_0]], [[FOR_COND16]] ], [ undef, [[IF_END24]] ]
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; CHECK-NEXT: br i1 true, label [[IF_END24]], label [[FOR_COND16]]
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; CHECK: if.end24:
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; CHECK-NEXT: [[J_3]] = phi i64* [ [[J_2]], [[FOR_COND20]] ], [ undef, [[ENTRY]] ]
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; CHECK-NEXT: br i1 false, label [[FOR_COND20]], label [[L1_PREHEADER]]
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; CHECK: l1.preheader:
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; CHECK-NEXT: br label [[L1]]
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;
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entry:
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br i1 undef, label %if.end24, label %for.cond16
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for.cond2thread-pre-split:
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br i1 false, label %for.body, label %for.cond8.preheader
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for.cond8.preheader:
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br i1 undef, label %l1, label %for.cond11thread-pre-split.lr.ph
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for.cond11thread-pre-split.lr.ph:
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br label %l1
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for.body:
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%k.031 = phi i64 [ %k.2, %l1 ], [ 15, %for.cond2thread-pre-split ]
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%cmp3 = icmp ne i64 %k.031, 3
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%conv4 = zext i1 %cmp3 to i64
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%0 = load i64, i64* @f
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%or = or i64 %0, %conv4
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store i64 %or, i64* @f
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%tobool7 = icmp ne i64 %k.031, 0
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%or.cond = or i1 %tobool7, false
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br i1 %or.cond, label %for.cond2thread-pre-split, label %lor.rhs
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lor.rhs:
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store i64 1, i64* @b, align 8
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br label %for.cond2thread-pre-split
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l1:
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%k.2 = phi i64 [ undef, %l1.preheader ], [ 15, %for.cond8.preheader ], [ 5, %for.cond11thread-pre-split.lr.ph ]
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store i64 7, i64* %j.3
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br label %for.body
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for.cond16:
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%j.0 = phi i64* [ @f, %entry ], [ %j.2, %for.cond20 ], [ @e, %for.cond16 ]
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br i1 undef, label %for.cond20, label %for.cond16
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for.cond20:
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%j.2 = phi i64* [ %j.0, %for.cond16 ], [ %j.3, %if.end24 ]
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br i1 true, label %if.end24, label %for.cond16
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if.end24:
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%j.3 = phi i64* [ %j.2, %for.cond20 ], [ undef, %entry ]
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br i1 false, label %for.cond20, label %l1.preheader
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l1.preheader:
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br label %l1
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}
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