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llvm-mirror/test/CodeGen/MSP430/Inst16mr.ll
Anton Korobeynikov dd18739c8d [MSP430] Add MC layer
Reapply r346374 with the fixes for modules build.

Original summary:

This change implements assembler parser, code emitter, ELF object writer
and disassembler for the MSP430 ISA.  Also, more instruction forms are added
to the target description.

Patch by Michael Skvortsov!

llvm-svn: 346948
2018-11-15 12:29:43 +00:00

59 lines
1.2 KiB
LLVM

; RUN: llc -march=msp430 < %s | FileCheck %s
target datalayout = "e-p:16:8:8-i8:8:8-i16:8:8-i32:8:8"
target triple = "msp430-generic-generic"
@foo = common global i16 0, align 2
define void @mov(i16 %a) nounwind {
; CHECK-LABEL: mov:
; CHECK: mov r12, &foo
store i16 %a, i16* @foo
ret void
}
define void @add(i16 %a) nounwind {
; CHECK-LABEL: add:
; CHECK: add r12, &foo
%1 = load i16, i16* @foo
%2 = add i16 %a, %1
store i16 %2, i16* @foo
ret void
}
define void @and(i16 %a) nounwind {
; CHECK-LABEL: and:
; CHECK: and r12, &foo
%1 = load i16, i16* @foo
%2 = and i16 %a, %1
store i16 %2, i16* @foo
ret void
}
define void @bis(i16 %a) nounwind {
; CHECK-LABEL: bis:
; CHECK: bis r12, &foo
%1 = load i16, i16* @foo
%2 = or i16 %a, %1
store i16 %2, i16* @foo
ret void
}
define void @bic(i16 zeroext %m) nounwind {
; CHECK-LABEL: bic:
; CHECK: bic r12, &foo
%1 = xor i16 %m, -1
%2 = load i16, i16* @foo
%3 = and i16 %2, %1
store i16 %3, i16* @foo
ret void
}
define void @xor(i16 %a) nounwind {
; CHECK-LABEL: xor:
; CHECK: xor r12, &foo
%1 = load i16, i16* @foo
%2 = xor i16 %a, %1
store i16 %2, i16* @foo
ret void
}