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fd61052e59
This patch removes the IsPairwiseForm flag from the Reduction Cost TTI hooks, along with some accompanying code for pattern matching reductions from trees starting at extract elements. IsPairWise is now assumed to be false, which was the predominant way that the value was used from both the Loop and SLP vectorizers. Since the adjustments such as D93860, the SLP vectorizer has not relied upon this distinction between paiwise and non-pairwise reductions. This also removes some code that was detecting reductions trees starting from extract elements inside the costmodel. This case was double-counting costs though, adding the individual costs on the individual instruction _and_ the total cost of the reduction. Removing it changes the costs in llvm/test/Analysis/CostModel/X86/reduction.ll to not double count. The cost of reduction intrinsics is still tested through the various tests in llvm/test/Analysis/CostModel/X86/reduce-xyz.ll. Differential Revision: https://reviews.llvm.org/D105484
1167 lines
42 KiB
C++
1167 lines
42 KiB
C++
//===- llvm/Analysis/TargetTransformInfo.cpp ------------------------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/Analysis/TargetTransformInfo.h"
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#include "llvm/Analysis/CFG.h"
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#include "llvm/Analysis/LoopIterator.h"
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#include "llvm/Analysis/TargetTransformInfoImpl.h"
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#include "llvm/IR/CFG.h"
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#include "llvm/IR/DataLayout.h"
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#include "llvm/IR/Dominators.h"
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#include "llvm/IR/Instruction.h"
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#include "llvm/IR/Instructions.h"
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#include "llvm/IR/IntrinsicInst.h"
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#include "llvm/IR/Module.h"
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#include "llvm/IR/Operator.h"
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#include "llvm/IR/PatternMatch.h"
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#include "llvm/InitializePasses.h"
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#include "llvm/Support/CommandLine.h"
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#include "llvm/Support/ErrorHandling.h"
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#include <utility>
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using namespace llvm;
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using namespace PatternMatch;
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#define DEBUG_TYPE "tti"
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static cl::opt<bool> EnableReduxCost("costmodel-reduxcost", cl::init(false),
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cl::Hidden,
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cl::desc("Recognize reduction patterns."));
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namespace {
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/// No-op implementation of the TTI interface using the utility base
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/// classes.
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///
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/// This is used when no target specific information is available.
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struct NoTTIImpl : TargetTransformInfoImplCRTPBase<NoTTIImpl> {
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explicit NoTTIImpl(const DataLayout &DL)
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: TargetTransformInfoImplCRTPBase<NoTTIImpl>(DL) {}
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};
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} // namespace
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bool HardwareLoopInfo::canAnalyze(LoopInfo &LI) {
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// If the loop has irreducible control flow, it can not be converted to
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// Hardware loop.
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LoopBlocksRPO RPOT(L);
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RPOT.perform(&LI);
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if (containsIrreducibleCFG<const BasicBlock *>(RPOT, LI))
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return false;
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return true;
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}
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IntrinsicCostAttributes::IntrinsicCostAttributes(
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Intrinsic::ID Id, const CallBase &CI, InstructionCost ScalarizationCost)
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: II(dyn_cast<IntrinsicInst>(&CI)), RetTy(CI.getType()), IID(Id),
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ScalarizationCost(ScalarizationCost) {
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if (const auto *FPMO = dyn_cast<FPMathOperator>(&CI))
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FMF = FPMO->getFastMathFlags();
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Arguments.insert(Arguments.begin(), CI.arg_begin(), CI.arg_end());
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FunctionType *FTy = CI.getCalledFunction()->getFunctionType();
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ParamTys.insert(ParamTys.begin(), FTy->param_begin(), FTy->param_end());
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}
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IntrinsicCostAttributes::IntrinsicCostAttributes(Intrinsic::ID Id, Type *RTy,
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ArrayRef<Type *> Tys,
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FastMathFlags Flags,
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const IntrinsicInst *I,
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InstructionCost ScalarCost)
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: II(I), RetTy(RTy), IID(Id), FMF(Flags), ScalarizationCost(ScalarCost) {
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ParamTys.insert(ParamTys.begin(), Tys.begin(), Tys.end());
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}
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IntrinsicCostAttributes::IntrinsicCostAttributes(Intrinsic::ID Id, Type *Ty,
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ArrayRef<const Value *> Args)
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: RetTy(Ty), IID(Id) {
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Arguments.insert(Arguments.begin(), Args.begin(), Args.end());
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ParamTys.reserve(Arguments.size());
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for (unsigned Idx = 0, Size = Arguments.size(); Idx != Size; ++Idx)
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ParamTys.push_back(Arguments[Idx]->getType());
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}
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IntrinsicCostAttributes::IntrinsicCostAttributes(Intrinsic::ID Id, Type *RTy,
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ArrayRef<const Value *> Args,
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ArrayRef<Type *> Tys,
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FastMathFlags Flags,
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const IntrinsicInst *I,
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InstructionCost ScalarCost)
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: II(I), RetTy(RTy), IID(Id), FMF(Flags), ScalarizationCost(ScalarCost) {
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ParamTys.insert(ParamTys.begin(), Tys.begin(), Tys.end());
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Arguments.insert(Arguments.begin(), Args.begin(), Args.end());
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}
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bool HardwareLoopInfo::isHardwareLoopCandidate(ScalarEvolution &SE,
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LoopInfo &LI, DominatorTree &DT,
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bool ForceNestedLoop,
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bool ForceHardwareLoopPHI) {
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SmallVector<BasicBlock *, 4> ExitingBlocks;
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L->getExitingBlocks(ExitingBlocks);
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for (BasicBlock *BB : ExitingBlocks) {
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// If we pass the updated counter back through a phi, we need to know
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// which latch the updated value will be coming from.
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if (!L->isLoopLatch(BB)) {
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if (ForceHardwareLoopPHI || CounterInReg)
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continue;
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}
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const SCEV *EC = SE.getExitCount(L, BB);
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if (isa<SCEVCouldNotCompute>(EC))
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continue;
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if (const SCEVConstant *ConstEC = dyn_cast<SCEVConstant>(EC)) {
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if (ConstEC->getValue()->isZero())
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continue;
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} else if (!SE.isLoopInvariant(EC, L))
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continue;
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if (SE.getTypeSizeInBits(EC->getType()) > CountType->getBitWidth())
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continue;
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// If this exiting block is contained in a nested loop, it is not eligible
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// for insertion of the branch-and-decrement since the inner loop would
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// end up messing up the value in the CTR.
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if (!IsNestingLegal && LI.getLoopFor(BB) != L && !ForceNestedLoop)
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continue;
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// We now have a loop-invariant count of loop iterations (which is not the
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// constant zero) for which we know that this loop will not exit via this
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// existing block.
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// We need to make sure that this block will run on every loop iteration.
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// For this to be true, we must dominate all blocks with backedges. Such
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// blocks are in-loop predecessors to the header block.
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bool NotAlways = false;
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for (BasicBlock *Pred : predecessors(L->getHeader())) {
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if (!L->contains(Pred))
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continue;
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if (!DT.dominates(BB, Pred)) {
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NotAlways = true;
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break;
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}
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}
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if (NotAlways)
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continue;
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// Make sure this blocks ends with a conditional branch.
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Instruction *TI = BB->getTerminator();
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if (!TI)
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continue;
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if (BranchInst *BI = dyn_cast<BranchInst>(TI)) {
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if (!BI->isConditional())
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continue;
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ExitBranch = BI;
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} else
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continue;
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// Note that this block may not be the loop latch block, even if the loop
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// has a latch block.
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ExitBlock = BB;
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TripCount = SE.getAddExpr(EC, SE.getOne(EC->getType()));
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if (!EC->getType()->isPointerTy() && EC->getType() != CountType)
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TripCount = SE.getZeroExtendExpr(TripCount, CountType);
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break;
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}
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if (!ExitBlock)
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return false;
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return true;
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}
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TargetTransformInfo::TargetTransformInfo(const DataLayout &DL)
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: TTIImpl(new Model<NoTTIImpl>(NoTTIImpl(DL))) {}
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TargetTransformInfo::~TargetTransformInfo() {}
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TargetTransformInfo::TargetTransformInfo(TargetTransformInfo &&Arg)
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: TTIImpl(std::move(Arg.TTIImpl)) {}
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TargetTransformInfo &TargetTransformInfo::operator=(TargetTransformInfo &&RHS) {
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TTIImpl = std::move(RHS.TTIImpl);
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return *this;
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}
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unsigned TargetTransformInfo::getInliningThresholdMultiplier() const {
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return TTIImpl->getInliningThresholdMultiplier();
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}
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unsigned
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TargetTransformInfo::adjustInliningThreshold(const CallBase *CB) const {
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return TTIImpl->adjustInliningThreshold(CB);
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}
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int TargetTransformInfo::getInlinerVectorBonusPercent() const {
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return TTIImpl->getInlinerVectorBonusPercent();
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}
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InstructionCost
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TargetTransformInfo::getGEPCost(Type *PointeeType, const Value *Ptr,
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ArrayRef<const Value *> Operands,
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TTI::TargetCostKind CostKind) const {
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return TTIImpl->getGEPCost(PointeeType, Ptr, Operands, CostKind);
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}
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unsigned TargetTransformInfo::getEstimatedNumberOfCaseClusters(
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const SwitchInst &SI, unsigned &JTSize, ProfileSummaryInfo *PSI,
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BlockFrequencyInfo *BFI) const {
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return TTIImpl->getEstimatedNumberOfCaseClusters(SI, JTSize, PSI, BFI);
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}
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InstructionCost
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TargetTransformInfo::getUserCost(const User *U,
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ArrayRef<const Value *> Operands,
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enum TargetCostKind CostKind) const {
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InstructionCost Cost = TTIImpl->getUserCost(U, Operands, CostKind);
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assert((CostKind == TTI::TCK_RecipThroughput || Cost >= 0) &&
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"TTI should not produce negative costs!");
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return Cost;
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}
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BranchProbability TargetTransformInfo::getPredictableBranchThreshold() const {
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return TTIImpl->getPredictableBranchThreshold();
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}
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bool TargetTransformInfo::hasBranchDivergence() const {
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return TTIImpl->hasBranchDivergence();
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}
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bool TargetTransformInfo::useGPUDivergenceAnalysis() const {
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return TTIImpl->useGPUDivergenceAnalysis();
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}
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bool TargetTransformInfo::isSourceOfDivergence(const Value *V) const {
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return TTIImpl->isSourceOfDivergence(V);
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}
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bool llvm::TargetTransformInfo::isAlwaysUniform(const Value *V) const {
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return TTIImpl->isAlwaysUniform(V);
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}
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unsigned TargetTransformInfo::getFlatAddressSpace() const {
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return TTIImpl->getFlatAddressSpace();
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}
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bool TargetTransformInfo::collectFlatAddressOperands(
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SmallVectorImpl<int> &OpIndexes, Intrinsic::ID IID) const {
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return TTIImpl->collectFlatAddressOperands(OpIndexes, IID);
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}
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bool TargetTransformInfo::isNoopAddrSpaceCast(unsigned FromAS,
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unsigned ToAS) const {
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return TTIImpl->isNoopAddrSpaceCast(FromAS, ToAS);
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}
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unsigned TargetTransformInfo::getAssumedAddrSpace(const Value *V) const {
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return TTIImpl->getAssumedAddrSpace(V);
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}
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Value *TargetTransformInfo::rewriteIntrinsicWithAddressSpace(
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IntrinsicInst *II, Value *OldV, Value *NewV) const {
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return TTIImpl->rewriteIntrinsicWithAddressSpace(II, OldV, NewV);
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}
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bool TargetTransformInfo::isLoweredToCall(const Function *F) const {
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return TTIImpl->isLoweredToCall(F);
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}
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bool TargetTransformInfo::isHardwareLoopProfitable(
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Loop *L, ScalarEvolution &SE, AssumptionCache &AC,
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TargetLibraryInfo *LibInfo, HardwareLoopInfo &HWLoopInfo) const {
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return TTIImpl->isHardwareLoopProfitable(L, SE, AC, LibInfo, HWLoopInfo);
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}
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bool TargetTransformInfo::preferPredicateOverEpilogue(
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Loop *L, LoopInfo *LI, ScalarEvolution &SE, AssumptionCache &AC,
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TargetLibraryInfo *TLI, DominatorTree *DT,
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const LoopAccessInfo *LAI) const {
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return TTIImpl->preferPredicateOverEpilogue(L, LI, SE, AC, TLI, DT, LAI);
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}
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bool TargetTransformInfo::emitGetActiveLaneMask() const {
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return TTIImpl->emitGetActiveLaneMask();
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}
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Optional<Instruction *>
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TargetTransformInfo::instCombineIntrinsic(InstCombiner &IC,
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IntrinsicInst &II) const {
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return TTIImpl->instCombineIntrinsic(IC, II);
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}
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Optional<Value *> TargetTransformInfo::simplifyDemandedUseBitsIntrinsic(
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InstCombiner &IC, IntrinsicInst &II, APInt DemandedMask, KnownBits &Known,
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bool &KnownBitsComputed) const {
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return TTIImpl->simplifyDemandedUseBitsIntrinsic(IC, II, DemandedMask, Known,
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KnownBitsComputed);
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}
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Optional<Value *> TargetTransformInfo::simplifyDemandedVectorEltsIntrinsic(
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InstCombiner &IC, IntrinsicInst &II, APInt DemandedElts, APInt &UndefElts,
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APInt &UndefElts2, APInt &UndefElts3,
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std::function<void(Instruction *, unsigned, APInt, APInt &)>
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SimplifyAndSetOp) const {
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return TTIImpl->simplifyDemandedVectorEltsIntrinsic(
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IC, II, DemandedElts, UndefElts, UndefElts2, UndefElts3,
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SimplifyAndSetOp);
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}
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void TargetTransformInfo::getUnrollingPreferences(
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Loop *L, ScalarEvolution &SE, UnrollingPreferences &UP) const {
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return TTIImpl->getUnrollingPreferences(L, SE, UP);
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}
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void TargetTransformInfo::getPeelingPreferences(Loop *L, ScalarEvolution &SE,
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PeelingPreferences &PP) const {
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return TTIImpl->getPeelingPreferences(L, SE, PP);
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}
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bool TargetTransformInfo::isLegalAddImmediate(int64_t Imm) const {
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return TTIImpl->isLegalAddImmediate(Imm);
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}
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bool TargetTransformInfo::isLegalICmpImmediate(int64_t Imm) const {
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return TTIImpl->isLegalICmpImmediate(Imm);
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}
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bool TargetTransformInfo::isLegalAddressingMode(Type *Ty, GlobalValue *BaseGV,
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int64_t BaseOffset,
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bool HasBaseReg, int64_t Scale,
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unsigned AddrSpace,
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Instruction *I) const {
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return TTIImpl->isLegalAddressingMode(Ty, BaseGV, BaseOffset, HasBaseReg,
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Scale, AddrSpace, I);
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}
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bool TargetTransformInfo::isLSRCostLess(LSRCost &C1, LSRCost &C2) const {
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return TTIImpl->isLSRCostLess(C1, C2);
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}
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bool TargetTransformInfo::isNumRegsMajorCostOfLSR() const {
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return TTIImpl->isNumRegsMajorCostOfLSR();
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}
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bool TargetTransformInfo::isProfitableLSRChainElement(Instruction *I) const {
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return TTIImpl->isProfitableLSRChainElement(I);
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}
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bool TargetTransformInfo::canMacroFuseCmp() const {
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return TTIImpl->canMacroFuseCmp();
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}
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bool TargetTransformInfo::canSaveCmp(Loop *L, BranchInst **BI,
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ScalarEvolution *SE, LoopInfo *LI,
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DominatorTree *DT, AssumptionCache *AC,
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TargetLibraryInfo *LibInfo) const {
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return TTIImpl->canSaveCmp(L, BI, SE, LI, DT, AC, LibInfo);
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}
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TTI::AddressingModeKind
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TargetTransformInfo::getPreferredAddressingMode(const Loop *L,
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ScalarEvolution *SE) const {
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return TTIImpl->getPreferredAddressingMode(L, SE);
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}
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bool TargetTransformInfo::isLegalMaskedStore(Type *DataType,
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Align Alignment) const {
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return TTIImpl->isLegalMaskedStore(DataType, Alignment);
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}
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bool TargetTransformInfo::isLegalMaskedLoad(Type *DataType,
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Align Alignment) const {
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return TTIImpl->isLegalMaskedLoad(DataType, Alignment);
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}
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bool TargetTransformInfo::isLegalNTStore(Type *DataType,
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Align Alignment) const {
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return TTIImpl->isLegalNTStore(DataType, Alignment);
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}
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bool TargetTransformInfo::isLegalNTLoad(Type *DataType, Align Alignment) const {
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return TTIImpl->isLegalNTLoad(DataType, Alignment);
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}
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bool TargetTransformInfo::isLegalMaskedGather(Type *DataType,
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Align Alignment) const {
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return TTIImpl->isLegalMaskedGather(DataType, Alignment);
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}
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bool TargetTransformInfo::isLegalMaskedScatter(Type *DataType,
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Align Alignment) const {
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return TTIImpl->isLegalMaskedScatter(DataType, Alignment);
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}
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bool TargetTransformInfo::isLegalMaskedCompressStore(Type *DataType) const {
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return TTIImpl->isLegalMaskedCompressStore(DataType);
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}
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bool TargetTransformInfo::isLegalMaskedExpandLoad(Type *DataType) const {
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return TTIImpl->isLegalMaskedExpandLoad(DataType);
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}
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bool TargetTransformInfo::hasDivRemOp(Type *DataType, bool IsSigned) const {
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return TTIImpl->hasDivRemOp(DataType, IsSigned);
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}
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bool TargetTransformInfo::hasVolatileVariant(Instruction *I,
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unsigned AddrSpace) const {
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return TTIImpl->hasVolatileVariant(I, AddrSpace);
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}
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bool TargetTransformInfo::prefersVectorizedAddressing() const {
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return TTIImpl->prefersVectorizedAddressing();
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}
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InstructionCost TargetTransformInfo::getScalingFactorCost(
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Type *Ty, GlobalValue *BaseGV, int64_t BaseOffset, bool HasBaseReg,
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int64_t Scale, unsigned AddrSpace) const {
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InstructionCost Cost = TTIImpl->getScalingFactorCost(
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Ty, BaseGV, BaseOffset, HasBaseReg, Scale, AddrSpace);
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assert(Cost >= 0 && "TTI should not produce negative costs!");
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return Cost;
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}
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bool TargetTransformInfo::LSRWithInstrQueries() const {
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return TTIImpl->LSRWithInstrQueries();
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}
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bool TargetTransformInfo::isTruncateFree(Type *Ty1, Type *Ty2) const {
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return TTIImpl->isTruncateFree(Ty1, Ty2);
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}
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bool TargetTransformInfo::isProfitableToHoist(Instruction *I) const {
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return TTIImpl->isProfitableToHoist(I);
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}
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bool TargetTransformInfo::useAA() const { return TTIImpl->useAA(); }
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bool TargetTransformInfo::isTypeLegal(Type *Ty) const {
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return TTIImpl->isTypeLegal(Ty);
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}
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InstructionCost TargetTransformInfo::getRegUsageForType(Type *Ty) const {
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return TTIImpl->getRegUsageForType(Ty);
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}
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bool TargetTransformInfo::shouldBuildLookupTables() const {
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return TTIImpl->shouldBuildLookupTables();
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}
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bool TargetTransformInfo::shouldBuildLookupTablesForConstant(
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Constant *C) const {
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return TTIImpl->shouldBuildLookupTablesForConstant(C);
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}
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bool TargetTransformInfo::shouldBuildRelLookupTables() const {
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return TTIImpl->shouldBuildRelLookupTables();
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}
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bool TargetTransformInfo::useColdCCForColdCall(Function &F) const {
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return TTIImpl->useColdCCForColdCall(F);
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}
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InstructionCost
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TargetTransformInfo::getScalarizationOverhead(VectorType *Ty,
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const APInt &DemandedElts,
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bool Insert, bool Extract) const {
|
|
return TTIImpl->getScalarizationOverhead(Ty, DemandedElts, Insert, Extract);
|
|
}
|
|
|
|
InstructionCost TargetTransformInfo::getOperandsScalarizationOverhead(
|
|
ArrayRef<const Value *> Args, ArrayRef<Type *> Tys) const {
|
|
return TTIImpl->getOperandsScalarizationOverhead(Args, Tys);
|
|
}
|
|
|
|
bool TargetTransformInfo::supportsEfficientVectorElementLoadStore() const {
|
|
return TTIImpl->supportsEfficientVectorElementLoadStore();
|
|
}
|
|
|
|
bool TargetTransformInfo::enableAggressiveInterleaving(
|
|
bool LoopHasReductions) const {
|
|
return TTIImpl->enableAggressiveInterleaving(LoopHasReductions);
|
|
}
|
|
|
|
TargetTransformInfo::MemCmpExpansionOptions
|
|
TargetTransformInfo::enableMemCmpExpansion(bool OptSize, bool IsZeroCmp) const {
|
|
return TTIImpl->enableMemCmpExpansion(OptSize, IsZeroCmp);
|
|
}
|
|
|
|
bool TargetTransformInfo::enableInterleavedAccessVectorization() const {
|
|
return TTIImpl->enableInterleavedAccessVectorization();
|
|
}
|
|
|
|
bool TargetTransformInfo::enableMaskedInterleavedAccessVectorization() const {
|
|
return TTIImpl->enableMaskedInterleavedAccessVectorization();
|
|
}
|
|
|
|
bool TargetTransformInfo::isFPVectorizationPotentiallyUnsafe() const {
|
|
return TTIImpl->isFPVectorizationPotentiallyUnsafe();
|
|
}
|
|
|
|
bool TargetTransformInfo::allowsMisalignedMemoryAccesses(LLVMContext &Context,
|
|
unsigned BitWidth,
|
|
unsigned AddressSpace,
|
|
Align Alignment,
|
|
bool *Fast) const {
|
|
return TTIImpl->allowsMisalignedMemoryAccesses(Context, BitWidth,
|
|
AddressSpace, Alignment, Fast);
|
|
}
|
|
|
|
TargetTransformInfo::PopcntSupportKind
|
|
TargetTransformInfo::getPopcntSupport(unsigned IntTyWidthInBit) const {
|
|
return TTIImpl->getPopcntSupport(IntTyWidthInBit);
|
|
}
|
|
|
|
bool TargetTransformInfo::haveFastSqrt(Type *Ty) const {
|
|
return TTIImpl->haveFastSqrt(Ty);
|
|
}
|
|
|
|
bool TargetTransformInfo::isFCmpOrdCheaperThanFCmpZero(Type *Ty) const {
|
|
return TTIImpl->isFCmpOrdCheaperThanFCmpZero(Ty);
|
|
}
|
|
|
|
InstructionCost TargetTransformInfo::getFPOpCost(Type *Ty) const {
|
|
InstructionCost Cost = TTIImpl->getFPOpCost(Ty);
|
|
assert(Cost >= 0 && "TTI should not produce negative costs!");
|
|
return Cost;
|
|
}
|
|
|
|
InstructionCost TargetTransformInfo::getIntImmCodeSizeCost(unsigned Opcode,
|
|
unsigned Idx,
|
|
const APInt &Imm,
|
|
Type *Ty) const {
|
|
InstructionCost Cost = TTIImpl->getIntImmCodeSizeCost(Opcode, Idx, Imm, Ty);
|
|
assert(Cost >= 0 && "TTI should not produce negative costs!");
|
|
return Cost;
|
|
}
|
|
|
|
InstructionCost
|
|
TargetTransformInfo::getIntImmCost(const APInt &Imm, Type *Ty,
|
|
TTI::TargetCostKind CostKind) const {
|
|
InstructionCost Cost = TTIImpl->getIntImmCost(Imm, Ty, CostKind);
|
|
assert(Cost >= 0 && "TTI should not produce negative costs!");
|
|
return Cost;
|
|
}
|
|
|
|
InstructionCost TargetTransformInfo::getIntImmCostInst(
|
|
unsigned Opcode, unsigned Idx, const APInt &Imm, Type *Ty,
|
|
TTI::TargetCostKind CostKind, Instruction *Inst) const {
|
|
InstructionCost Cost =
|
|
TTIImpl->getIntImmCostInst(Opcode, Idx, Imm, Ty, CostKind, Inst);
|
|
assert(Cost >= 0 && "TTI should not produce negative costs!");
|
|
return Cost;
|
|
}
|
|
|
|
InstructionCost
|
|
TargetTransformInfo::getIntImmCostIntrin(Intrinsic::ID IID, unsigned Idx,
|
|
const APInt &Imm, Type *Ty,
|
|
TTI::TargetCostKind CostKind) const {
|
|
InstructionCost Cost =
|
|
TTIImpl->getIntImmCostIntrin(IID, Idx, Imm, Ty, CostKind);
|
|
assert(Cost >= 0 && "TTI should not produce negative costs!");
|
|
return Cost;
|
|
}
|
|
|
|
unsigned TargetTransformInfo::getNumberOfRegisters(unsigned ClassID) const {
|
|
return TTIImpl->getNumberOfRegisters(ClassID);
|
|
}
|
|
|
|
unsigned TargetTransformInfo::getRegisterClassForType(bool Vector,
|
|
Type *Ty) const {
|
|
return TTIImpl->getRegisterClassForType(Vector, Ty);
|
|
}
|
|
|
|
const char *TargetTransformInfo::getRegisterClassName(unsigned ClassID) const {
|
|
return TTIImpl->getRegisterClassName(ClassID);
|
|
}
|
|
|
|
TypeSize TargetTransformInfo::getRegisterBitWidth(
|
|
TargetTransformInfo::RegisterKind K) const {
|
|
return TTIImpl->getRegisterBitWidth(K);
|
|
}
|
|
|
|
unsigned TargetTransformInfo::getMinVectorRegisterBitWidth() const {
|
|
return TTIImpl->getMinVectorRegisterBitWidth();
|
|
}
|
|
|
|
Optional<unsigned> TargetTransformInfo::getMaxVScale() const {
|
|
return TTIImpl->getMaxVScale();
|
|
}
|
|
|
|
bool TargetTransformInfo::shouldMaximizeVectorBandwidth() const {
|
|
return TTIImpl->shouldMaximizeVectorBandwidth();
|
|
}
|
|
|
|
ElementCount TargetTransformInfo::getMinimumVF(unsigned ElemWidth,
|
|
bool IsScalable) const {
|
|
return TTIImpl->getMinimumVF(ElemWidth, IsScalable);
|
|
}
|
|
|
|
unsigned TargetTransformInfo::getMaximumVF(unsigned ElemWidth,
|
|
unsigned Opcode) const {
|
|
return TTIImpl->getMaximumVF(ElemWidth, Opcode);
|
|
}
|
|
|
|
bool TargetTransformInfo::shouldConsiderAddressTypePromotion(
|
|
const Instruction &I, bool &AllowPromotionWithoutCommonHeader) const {
|
|
return TTIImpl->shouldConsiderAddressTypePromotion(
|
|
I, AllowPromotionWithoutCommonHeader);
|
|
}
|
|
|
|
unsigned TargetTransformInfo::getCacheLineSize() const {
|
|
return TTIImpl->getCacheLineSize();
|
|
}
|
|
|
|
llvm::Optional<unsigned>
|
|
TargetTransformInfo::getCacheSize(CacheLevel Level) const {
|
|
return TTIImpl->getCacheSize(Level);
|
|
}
|
|
|
|
llvm::Optional<unsigned>
|
|
TargetTransformInfo::getCacheAssociativity(CacheLevel Level) const {
|
|
return TTIImpl->getCacheAssociativity(Level);
|
|
}
|
|
|
|
unsigned TargetTransformInfo::getPrefetchDistance() const {
|
|
return TTIImpl->getPrefetchDistance();
|
|
}
|
|
|
|
unsigned TargetTransformInfo::getMinPrefetchStride(
|
|
unsigned NumMemAccesses, unsigned NumStridedMemAccesses,
|
|
unsigned NumPrefetches, bool HasCall) const {
|
|
return TTIImpl->getMinPrefetchStride(NumMemAccesses, NumStridedMemAccesses,
|
|
NumPrefetches, HasCall);
|
|
}
|
|
|
|
unsigned TargetTransformInfo::getMaxPrefetchIterationsAhead() const {
|
|
return TTIImpl->getMaxPrefetchIterationsAhead();
|
|
}
|
|
|
|
bool TargetTransformInfo::enableWritePrefetching() const {
|
|
return TTIImpl->enableWritePrefetching();
|
|
}
|
|
|
|
unsigned TargetTransformInfo::getMaxInterleaveFactor(unsigned VF) const {
|
|
return TTIImpl->getMaxInterleaveFactor(VF);
|
|
}
|
|
|
|
TargetTransformInfo::OperandValueKind
|
|
TargetTransformInfo::getOperandInfo(const Value *V,
|
|
OperandValueProperties &OpProps) {
|
|
OperandValueKind OpInfo = OK_AnyValue;
|
|
OpProps = OP_None;
|
|
|
|
if (const auto *CI = dyn_cast<ConstantInt>(V)) {
|
|
if (CI->getValue().isPowerOf2())
|
|
OpProps = OP_PowerOf2;
|
|
return OK_UniformConstantValue;
|
|
}
|
|
|
|
// A broadcast shuffle creates a uniform value.
|
|
// TODO: Add support for non-zero index broadcasts.
|
|
// TODO: Add support for different source vector width.
|
|
if (const auto *ShuffleInst = dyn_cast<ShuffleVectorInst>(V))
|
|
if (ShuffleInst->isZeroEltSplat())
|
|
OpInfo = OK_UniformValue;
|
|
|
|
const Value *Splat = getSplatValue(V);
|
|
|
|
// Check for a splat of a constant or for a non uniform vector of constants
|
|
// and check if the constant(s) are all powers of two.
|
|
if (isa<ConstantVector>(V) || isa<ConstantDataVector>(V)) {
|
|
OpInfo = OK_NonUniformConstantValue;
|
|
if (Splat) {
|
|
OpInfo = OK_UniformConstantValue;
|
|
if (auto *CI = dyn_cast<ConstantInt>(Splat))
|
|
if (CI->getValue().isPowerOf2())
|
|
OpProps = OP_PowerOf2;
|
|
} else if (const auto *CDS = dyn_cast<ConstantDataSequential>(V)) {
|
|
OpProps = OP_PowerOf2;
|
|
for (unsigned I = 0, E = CDS->getNumElements(); I != E; ++I) {
|
|
if (auto *CI = dyn_cast<ConstantInt>(CDS->getElementAsConstant(I)))
|
|
if (CI->getValue().isPowerOf2())
|
|
continue;
|
|
OpProps = OP_None;
|
|
break;
|
|
}
|
|
}
|
|
}
|
|
|
|
// Check for a splat of a uniform value. This is not loop aware, so return
|
|
// true only for the obviously uniform cases (argument, globalvalue)
|
|
if (Splat && (isa<Argument>(Splat) || isa<GlobalValue>(Splat)))
|
|
OpInfo = OK_UniformValue;
|
|
|
|
return OpInfo;
|
|
}
|
|
|
|
InstructionCost TargetTransformInfo::getArithmeticInstrCost(
|
|
unsigned Opcode, Type *Ty, TTI::TargetCostKind CostKind,
|
|
OperandValueKind Opd1Info, OperandValueKind Opd2Info,
|
|
OperandValueProperties Opd1PropInfo, OperandValueProperties Opd2PropInfo,
|
|
ArrayRef<const Value *> Args, const Instruction *CxtI) const {
|
|
InstructionCost Cost =
|
|
TTIImpl->getArithmeticInstrCost(Opcode, Ty, CostKind, Opd1Info, Opd2Info,
|
|
Opd1PropInfo, Opd2PropInfo, Args, CxtI);
|
|
assert(Cost >= 0 && "TTI should not produce negative costs!");
|
|
return Cost;
|
|
}
|
|
|
|
InstructionCost TargetTransformInfo::getShuffleCost(ShuffleKind Kind,
|
|
VectorType *Ty,
|
|
ArrayRef<int> Mask,
|
|
int Index,
|
|
VectorType *SubTp) const {
|
|
InstructionCost Cost = TTIImpl->getShuffleCost(Kind, Ty, Mask, Index, SubTp);
|
|
assert(Cost >= 0 && "TTI should not produce negative costs!");
|
|
return Cost;
|
|
}
|
|
|
|
TTI::CastContextHint
|
|
TargetTransformInfo::getCastContextHint(const Instruction *I) {
|
|
if (!I)
|
|
return CastContextHint::None;
|
|
|
|
auto getLoadStoreKind = [](const Value *V, unsigned LdStOp, unsigned MaskedOp,
|
|
unsigned GatScatOp) {
|
|
const Instruction *I = dyn_cast<Instruction>(V);
|
|
if (!I)
|
|
return CastContextHint::None;
|
|
|
|
if (I->getOpcode() == LdStOp)
|
|
return CastContextHint::Normal;
|
|
|
|
if (const IntrinsicInst *II = dyn_cast<IntrinsicInst>(I)) {
|
|
if (II->getIntrinsicID() == MaskedOp)
|
|
return TTI::CastContextHint::Masked;
|
|
if (II->getIntrinsicID() == GatScatOp)
|
|
return TTI::CastContextHint::GatherScatter;
|
|
}
|
|
|
|
return TTI::CastContextHint::None;
|
|
};
|
|
|
|
switch (I->getOpcode()) {
|
|
case Instruction::ZExt:
|
|
case Instruction::SExt:
|
|
case Instruction::FPExt:
|
|
return getLoadStoreKind(I->getOperand(0), Instruction::Load,
|
|
Intrinsic::masked_load, Intrinsic::masked_gather);
|
|
case Instruction::Trunc:
|
|
case Instruction::FPTrunc:
|
|
if (I->hasOneUse())
|
|
return getLoadStoreKind(*I->user_begin(), Instruction::Store,
|
|
Intrinsic::masked_store,
|
|
Intrinsic::masked_scatter);
|
|
break;
|
|
default:
|
|
return CastContextHint::None;
|
|
}
|
|
|
|
return TTI::CastContextHint::None;
|
|
}
|
|
|
|
InstructionCost TargetTransformInfo::getCastInstrCost(
|
|
unsigned Opcode, Type *Dst, Type *Src, CastContextHint CCH,
|
|
TTI::TargetCostKind CostKind, const Instruction *I) const {
|
|
assert((I == nullptr || I->getOpcode() == Opcode) &&
|
|
"Opcode should reflect passed instruction.");
|
|
InstructionCost Cost =
|
|
TTIImpl->getCastInstrCost(Opcode, Dst, Src, CCH, CostKind, I);
|
|
assert(Cost >= 0 && "TTI should not produce negative costs!");
|
|
return Cost;
|
|
}
|
|
|
|
InstructionCost TargetTransformInfo::getExtractWithExtendCost(
|
|
unsigned Opcode, Type *Dst, VectorType *VecTy, unsigned Index) const {
|
|
InstructionCost Cost =
|
|
TTIImpl->getExtractWithExtendCost(Opcode, Dst, VecTy, Index);
|
|
assert(Cost >= 0 && "TTI should not produce negative costs!");
|
|
return Cost;
|
|
}
|
|
|
|
InstructionCost TargetTransformInfo::getCFInstrCost(
|
|
unsigned Opcode, TTI::TargetCostKind CostKind, const Instruction *I) const {
|
|
assert((I == nullptr || I->getOpcode() == Opcode) &&
|
|
"Opcode should reflect passed instruction.");
|
|
InstructionCost Cost = TTIImpl->getCFInstrCost(Opcode, CostKind, I);
|
|
assert(Cost >= 0 && "TTI should not produce negative costs!");
|
|
return Cost;
|
|
}
|
|
|
|
InstructionCost TargetTransformInfo::getCmpSelInstrCost(
|
|
unsigned Opcode, Type *ValTy, Type *CondTy, CmpInst::Predicate VecPred,
|
|
TTI::TargetCostKind CostKind, const Instruction *I) const {
|
|
assert((I == nullptr || I->getOpcode() == Opcode) &&
|
|
"Opcode should reflect passed instruction.");
|
|
InstructionCost Cost =
|
|
TTIImpl->getCmpSelInstrCost(Opcode, ValTy, CondTy, VecPred, CostKind, I);
|
|
assert(Cost >= 0 && "TTI should not produce negative costs!");
|
|
return Cost;
|
|
}
|
|
|
|
InstructionCost TargetTransformInfo::getVectorInstrCost(unsigned Opcode,
|
|
Type *Val,
|
|
unsigned Index) const {
|
|
InstructionCost Cost = TTIImpl->getVectorInstrCost(Opcode, Val, Index);
|
|
assert(Cost >= 0 && "TTI should not produce negative costs!");
|
|
return Cost;
|
|
}
|
|
|
|
InstructionCost TargetTransformInfo::getMemoryOpCost(
|
|
unsigned Opcode, Type *Src, Align Alignment, unsigned AddressSpace,
|
|
TTI::TargetCostKind CostKind, const Instruction *I) const {
|
|
assert((I == nullptr || I->getOpcode() == Opcode) &&
|
|
"Opcode should reflect passed instruction.");
|
|
InstructionCost Cost = TTIImpl->getMemoryOpCost(Opcode, Src, Alignment,
|
|
AddressSpace, CostKind, I);
|
|
assert(Cost >= 0 && "TTI should not produce negative costs!");
|
|
return Cost;
|
|
}
|
|
|
|
InstructionCost TargetTransformInfo::getMaskedMemoryOpCost(
|
|
unsigned Opcode, Type *Src, Align Alignment, unsigned AddressSpace,
|
|
TTI::TargetCostKind CostKind) const {
|
|
InstructionCost Cost = TTIImpl->getMaskedMemoryOpCost(Opcode, Src, Alignment,
|
|
AddressSpace, CostKind);
|
|
assert(Cost >= 0 && "TTI should not produce negative costs!");
|
|
return Cost;
|
|
}
|
|
|
|
InstructionCost TargetTransformInfo::getGatherScatterOpCost(
|
|
unsigned Opcode, Type *DataTy, const Value *Ptr, bool VariableMask,
|
|
Align Alignment, TTI::TargetCostKind CostKind, const Instruction *I) const {
|
|
InstructionCost Cost = TTIImpl->getGatherScatterOpCost(
|
|
Opcode, DataTy, Ptr, VariableMask, Alignment, CostKind, I);
|
|
assert(Cost >= 0 && "TTI should not produce negative costs!");
|
|
return Cost;
|
|
}
|
|
|
|
InstructionCost TargetTransformInfo::getInterleavedMemoryOpCost(
|
|
unsigned Opcode, Type *VecTy, unsigned Factor, ArrayRef<unsigned> Indices,
|
|
Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind,
|
|
bool UseMaskForCond, bool UseMaskForGaps) const {
|
|
InstructionCost Cost = TTIImpl->getInterleavedMemoryOpCost(
|
|
Opcode, VecTy, Factor, Indices, Alignment, AddressSpace, CostKind,
|
|
UseMaskForCond, UseMaskForGaps);
|
|
assert(Cost >= 0 && "TTI should not produce negative costs!");
|
|
return Cost;
|
|
}
|
|
|
|
InstructionCost
|
|
TargetTransformInfo::getIntrinsicInstrCost(const IntrinsicCostAttributes &ICA,
|
|
TTI::TargetCostKind CostKind) const {
|
|
InstructionCost Cost = TTIImpl->getIntrinsicInstrCost(ICA, CostKind);
|
|
assert(Cost >= 0 && "TTI should not produce negative costs!");
|
|
return Cost;
|
|
}
|
|
|
|
InstructionCost
|
|
TargetTransformInfo::getCallInstrCost(Function *F, Type *RetTy,
|
|
ArrayRef<Type *> Tys,
|
|
TTI::TargetCostKind CostKind) const {
|
|
InstructionCost Cost = TTIImpl->getCallInstrCost(F, RetTy, Tys, CostKind);
|
|
assert(Cost >= 0 && "TTI should not produce negative costs!");
|
|
return Cost;
|
|
}
|
|
|
|
unsigned TargetTransformInfo::getNumberOfParts(Type *Tp) const {
|
|
return TTIImpl->getNumberOfParts(Tp);
|
|
}
|
|
|
|
InstructionCost
|
|
TargetTransformInfo::getAddressComputationCost(Type *Tp, ScalarEvolution *SE,
|
|
const SCEV *Ptr) const {
|
|
InstructionCost Cost = TTIImpl->getAddressComputationCost(Tp, SE, Ptr);
|
|
assert(Cost >= 0 && "TTI should not produce negative costs!");
|
|
return Cost;
|
|
}
|
|
|
|
InstructionCost TargetTransformInfo::getMemcpyCost(const Instruction *I) const {
|
|
InstructionCost Cost = TTIImpl->getMemcpyCost(I);
|
|
assert(Cost >= 0 && "TTI should not produce negative costs!");
|
|
return Cost;
|
|
}
|
|
|
|
InstructionCost TargetTransformInfo::getArithmeticReductionCost(
|
|
unsigned Opcode, VectorType *Ty, TTI::TargetCostKind CostKind) const {
|
|
InstructionCost Cost =
|
|
TTIImpl->getArithmeticReductionCost(Opcode, Ty, CostKind);
|
|
assert(Cost >= 0 && "TTI should not produce negative costs!");
|
|
return Cost;
|
|
}
|
|
|
|
InstructionCost TargetTransformInfo::getMinMaxReductionCost(
|
|
VectorType *Ty, VectorType *CondTy, bool IsUnsigned,
|
|
TTI::TargetCostKind CostKind) const {
|
|
InstructionCost Cost =
|
|
TTIImpl->getMinMaxReductionCost(Ty, CondTy, IsUnsigned, CostKind);
|
|
assert(Cost >= 0 && "TTI should not produce negative costs!");
|
|
return Cost;
|
|
}
|
|
|
|
InstructionCost TargetTransformInfo::getExtendedAddReductionCost(
|
|
bool IsMLA, bool IsUnsigned, Type *ResTy, VectorType *Ty,
|
|
TTI::TargetCostKind CostKind) const {
|
|
return TTIImpl->getExtendedAddReductionCost(IsMLA, IsUnsigned, ResTy, Ty,
|
|
CostKind);
|
|
}
|
|
|
|
InstructionCost
|
|
TargetTransformInfo::getCostOfKeepingLiveOverCall(ArrayRef<Type *> Tys) const {
|
|
return TTIImpl->getCostOfKeepingLiveOverCall(Tys);
|
|
}
|
|
|
|
bool TargetTransformInfo::getTgtMemIntrinsic(IntrinsicInst *Inst,
|
|
MemIntrinsicInfo &Info) const {
|
|
return TTIImpl->getTgtMemIntrinsic(Inst, Info);
|
|
}
|
|
|
|
unsigned TargetTransformInfo::getAtomicMemIntrinsicMaxElementSize() const {
|
|
return TTIImpl->getAtomicMemIntrinsicMaxElementSize();
|
|
}
|
|
|
|
Value *TargetTransformInfo::getOrCreateResultFromMemIntrinsic(
|
|
IntrinsicInst *Inst, Type *ExpectedType) const {
|
|
return TTIImpl->getOrCreateResultFromMemIntrinsic(Inst, ExpectedType);
|
|
}
|
|
|
|
Type *TargetTransformInfo::getMemcpyLoopLoweringType(
|
|
LLVMContext &Context, Value *Length, unsigned SrcAddrSpace,
|
|
unsigned DestAddrSpace, unsigned SrcAlign, unsigned DestAlign) const {
|
|
return TTIImpl->getMemcpyLoopLoweringType(Context, Length, SrcAddrSpace,
|
|
DestAddrSpace, SrcAlign, DestAlign);
|
|
}
|
|
|
|
void TargetTransformInfo::getMemcpyLoopResidualLoweringType(
|
|
SmallVectorImpl<Type *> &OpsOut, LLVMContext &Context,
|
|
unsigned RemainingBytes, unsigned SrcAddrSpace, unsigned DestAddrSpace,
|
|
unsigned SrcAlign, unsigned DestAlign) const {
|
|
TTIImpl->getMemcpyLoopResidualLoweringType(OpsOut, Context, RemainingBytes,
|
|
SrcAddrSpace, DestAddrSpace,
|
|
SrcAlign, DestAlign);
|
|
}
|
|
|
|
bool TargetTransformInfo::areInlineCompatible(const Function *Caller,
|
|
const Function *Callee) const {
|
|
return TTIImpl->areInlineCompatible(Caller, Callee);
|
|
}
|
|
|
|
bool TargetTransformInfo::areFunctionArgsABICompatible(
|
|
const Function *Caller, const Function *Callee,
|
|
SmallPtrSetImpl<Argument *> &Args) const {
|
|
return TTIImpl->areFunctionArgsABICompatible(Caller, Callee, Args);
|
|
}
|
|
|
|
bool TargetTransformInfo::isIndexedLoadLegal(MemIndexedMode Mode,
|
|
Type *Ty) const {
|
|
return TTIImpl->isIndexedLoadLegal(Mode, Ty);
|
|
}
|
|
|
|
bool TargetTransformInfo::isIndexedStoreLegal(MemIndexedMode Mode,
|
|
Type *Ty) const {
|
|
return TTIImpl->isIndexedStoreLegal(Mode, Ty);
|
|
}
|
|
|
|
unsigned TargetTransformInfo::getLoadStoreVecRegBitWidth(unsigned AS) const {
|
|
return TTIImpl->getLoadStoreVecRegBitWidth(AS);
|
|
}
|
|
|
|
bool TargetTransformInfo::isLegalToVectorizeLoad(LoadInst *LI) const {
|
|
return TTIImpl->isLegalToVectorizeLoad(LI);
|
|
}
|
|
|
|
bool TargetTransformInfo::isLegalToVectorizeStore(StoreInst *SI) const {
|
|
return TTIImpl->isLegalToVectorizeStore(SI);
|
|
}
|
|
|
|
bool TargetTransformInfo::isLegalToVectorizeLoadChain(
|
|
unsigned ChainSizeInBytes, Align Alignment, unsigned AddrSpace) const {
|
|
return TTIImpl->isLegalToVectorizeLoadChain(ChainSizeInBytes, Alignment,
|
|
AddrSpace);
|
|
}
|
|
|
|
bool TargetTransformInfo::isLegalToVectorizeStoreChain(
|
|
unsigned ChainSizeInBytes, Align Alignment, unsigned AddrSpace) const {
|
|
return TTIImpl->isLegalToVectorizeStoreChain(ChainSizeInBytes, Alignment,
|
|
AddrSpace);
|
|
}
|
|
|
|
bool TargetTransformInfo::isLegalToVectorizeReduction(
|
|
const RecurrenceDescriptor &RdxDesc, ElementCount VF) const {
|
|
return TTIImpl->isLegalToVectorizeReduction(RdxDesc, VF);
|
|
}
|
|
|
|
bool TargetTransformInfo::isElementTypeLegalForScalableVector(Type *Ty) const {
|
|
return TTIImpl->isElementTypeLegalForScalableVector(Ty);
|
|
}
|
|
|
|
unsigned TargetTransformInfo::getLoadVectorFactor(unsigned VF,
|
|
unsigned LoadSize,
|
|
unsigned ChainSizeInBytes,
|
|
VectorType *VecTy) const {
|
|
return TTIImpl->getLoadVectorFactor(VF, LoadSize, ChainSizeInBytes, VecTy);
|
|
}
|
|
|
|
unsigned TargetTransformInfo::getStoreVectorFactor(unsigned VF,
|
|
unsigned StoreSize,
|
|
unsigned ChainSizeInBytes,
|
|
VectorType *VecTy) const {
|
|
return TTIImpl->getStoreVectorFactor(VF, StoreSize, ChainSizeInBytes, VecTy);
|
|
}
|
|
|
|
bool TargetTransformInfo::preferInLoopReduction(unsigned Opcode, Type *Ty,
|
|
ReductionFlags Flags) const {
|
|
return TTIImpl->preferInLoopReduction(Opcode, Ty, Flags);
|
|
}
|
|
|
|
bool TargetTransformInfo::preferPredicatedReductionSelect(
|
|
unsigned Opcode, Type *Ty, ReductionFlags Flags) const {
|
|
return TTIImpl->preferPredicatedReductionSelect(Opcode, Ty, Flags);
|
|
}
|
|
|
|
TargetTransformInfo::VPLegalization
|
|
TargetTransformInfo::getVPLegalizationStrategy(const VPIntrinsic &VPI) const {
|
|
return TTIImpl->getVPLegalizationStrategy(VPI);
|
|
}
|
|
|
|
bool TargetTransformInfo::shouldExpandReduction(const IntrinsicInst *II) const {
|
|
return TTIImpl->shouldExpandReduction(II);
|
|
}
|
|
|
|
unsigned TargetTransformInfo::getGISelRematGlobalCost() const {
|
|
return TTIImpl->getGISelRematGlobalCost();
|
|
}
|
|
|
|
bool TargetTransformInfo::supportsScalableVectors() const {
|
|
return TTIImpl->supportsScalableVectors();
|
|
}
|
|
|
|
bool TargetTransformInfo::hasActiveVectorLength() const {
|
|
return TTIImpl->hasActiveVectorLength();
|
|
}
|
|
|
|
InstructionCost
|
|
TargetTransformInfo::getInstructionLatency(const Instruction *I) const {
|
|
return TTIImpl->getInstructionLatency(I);
|
|
}
|
|
|
|
InstructionCost
|
|
TargetTransformInfo::getInstructionThroughput(const Instruction *I) const {
|
|
TTI::TargetCostKind CostKind = TTI::TCK_RecipThroughput;
|
|
|
|
switch (I->getOpcode()) {
|
|
case Instruction::GetElementPtr:
|
|
case Instruction::Ret:
|
|
case Instruction::PHI:
|
|
case Instruction::Br:
|
|
case Instruction::Add:
|
|
case Instruction::FAdd:
|
|
case Instruction::Sub:
|
|
case Instruction::FSub:
|
|
case Instruction::Mul:
|
|
case Instruction::FMul:
|
|
case Instruction::UDiv:
|
|
case Instruction::SDiv:
|
|
case Instruction::FDiv:
|
|
case Instruction::URem:
|
|
case Instruction::SRem:
|
|
case Instruction::FRem:
|
|
case Instruction::Shl:
|
|
case Instruction::LShr:
|
|
case Instruction::AShr:
|
|
case Instruction::And:
|
|
case Instruction::Or:
|
|
case Instruction::Xor:
|
|
case Instruction::FNeg:
|
|
case Instruction::Select:
|
|
case Instruction::ICmp:
|
|
case Instruction::FCmp:
|
|
case Instruction::Store:
|
|
case Instruction::Load:
|
|
case Instruction::ZExt:
|
|
case Instruction::SExt:
|
|
case Instruction::FPToUI:
|
|
case Instruction::FPToSI:
|
|
case Instruction::FPExt:
|
|
case Instruction::PtrToInt:
|
|
case Instruction::IntToPtr:
|
|
case Instruction::SIToFP:
|
|
case Instruction::UIToFP:
|
|
case Instruction::Trunc:
|
|
case Instruction::FPTrunc:
|
|
case Instruction::BitCast:
|
|
case Instruction::AddrSpaceCast:
|
|
case Instruction::ExtractElement:
|
|
case Instruction::InsertElement:
|
|
case Instruction::ExtractValue:
|
|
case Instruction::ShuffleVector:
|
|
case Instruction::Call:
|
|
case Instruction::Switch:
|
|
return getUserCost(I, CostKind);
|
|
default:
|
|
// We don't have any information on this instruction.
|
|
return -1;
|
|
}
|
|
}
|
|
|
|
TargetTransformInfo::Concept::~Concept() {}
|
|
|
|
TargetIRAnalysis::TargetIRAnalysis() : TTICallback(&getDefaultTTI) {}
|
|
|
|
TargetIRAnalysis::TargetIRAnalysis(
|
|
std::function<Result(const Function &)> TTICallback)
|
|
: TTICallback(std::move(TTICallback)) {}
|
|
|
|
TargetIRAnalysis::Result TargetIRAnalysis::run(const Function &F,
|
|
FunctionAnalysisManager &) {
|
|
return TTICallback(F);
|
|
}
|
|
|
|
AnalysisKey TargetIRAnalysis::Key;
|
|
|
|
TargetIRAnalysis::Result TargetIRAnalysis::getDefaultTTI(const Function &F) {
|
|
return Result(F.getParent()->getDataLayout());
|
|
}
|
|
|
|
// Register the basic pass.
|
|
INITIALIZE_PASS(TargetTransformInfoWrapperPass, "tti",
|
|
"Target Transform Information", false, true)
|
|
char TargetTransformInfoWrapperPass::ID = 0;
|
|
|
|
void TargetTransformInfoWrapperPass::anchor() {}
|
|
|
|
TargetTransformInfoWrapperPass::TargetTransformInfoWrapperPass()
|
|
: ImmutablePass(ID) {
|
|
initializeTargetTransformInfoWrapperPassPass(
|
|
*PassRegistry::getPassRegistry());
|
|
}
|
|
|
|
TargetTransformInfoWrapperPass::TargetTransformInfoWrapperPass(
|
|
TargetIRAnalysis TIRA)
|
|
: ImmutablePass(ID), TIRA(std::move(TIRA)) {
|
|
initializeTargetTransformInfoWrapperPassPass(
|
|
*PassRegistry::getPassRegistry());
|
|
}
|
|
|
|
TargetTransformInfo &TargetTransformInfoWrapperPass::getTTI(const Function &F) {
|
|
FunctionAnalysisManager DummyFAM;
|
|
TTI = TIRA.run(F, DummyFAM);
|
|
return *TTI;
|
|
}
|
|
|
|
ImmutablePass *
|
|
llvm::createTargetTransformInfoWrapperPass(TargetIRAnalysis TIRA) {
|
|
return new TargetTransformInfoWrapperPass(std::move(TIRA));
|
|
}
|