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llvm-mirror/test/CodeGen/Hexagon/autohvx
Krzysztof Parzyszek 3d8191f695 [Hexagon] Use shuffles when lowering "gather" shufflevectors
Shufflevector instructions in LLVM IR that extract a subset of elements
of a longer input into a shorter vector can be done using VECTOR_SHUFFLEs.
This will avoid expanding them into constly extracts and inserts.

llvm-svn: 342091
2018-09-12 22:14:52 +00:00
..
align2-64b.ll [Hexagon] Use vector align-left when shift amount fits in 3 bits 2018-05-30 13:45:34 +00:00
align2-128b.ll [Hexagon] Use vector align-left when shift amount fits in 3 bits 2018-05-30 13:45:34 +00:00
align-64b.ll [Hexagon] Use vector align-left when shift amount fits in 3 bits 2018-05-30 13:45:34 +00:00
align-128b.ll [Hexagon] Use vector align-left when shift amount fits in 3 bits 2018-05-30 13:45:34 +00:00
arith.ll
bitcount-64b.ll [Hexagon] Select HVX code for vector CTPOP, CTLZ, and CTTZ 2018-06-01 14:52:58 +00:00
bitcount-128b.ll [Hexagon] Select HVX code for vector CTPOP, CTLZ, and CTTZ 2018-06-01 14:52:58 +00:00
bitwise-pred-64b.ll [Hexagon] Add patterns for accumulating HVX compares 2018-05-22 18:27:02 +00:00
bitwise-pred-128b.ll [Hexagon] Add patterns for accumulating HVX compares 2018-05-22 18:27:02 +00:00
bswap.ll [Hexagon] Generate code for vector bswap intrinsics 2018-04-19 14:46:44 +00:00
build-vector-i32-type.ll [Hexagon] Simplify CFG after atomic expansion 2018-08-02 22:17:53 +00:00
concat-vectors-64b.ll
concat-vectors-128b.ll
contract-64b.ll
contract-128b.ll
ctpop-split.ll [Hexagon] Split CTPOP of vector pairs 2018-06-06 18:03:29 +00:00
deal-64b.ll
deal-128b.ll
delta2-64b.ll
delta-64b.ll
delta-128b.ll
extract-element.ll
float-cost.ll [Hexagon] Make floating point operations expensive for vectorization 2018-06-12 15:12:50 +00:00
interleave.ll [Hexagon] Enable interleaving in loop vectorizer 2018-08-22 20:15:04 +00:00
isel-anyext-inreg.ll [Hexagon] Simplify CFG after atomic expansion 2018-08-02 22:17:53 +00:00
isel-anyext-pair.ll [Hexagon] Simplify CFG after atomic expansion 2018-08-02 22:17:53 +00:00
isel-bitcast-vsplat2.ll [Hexagon] Improve HVX instruction selection (bitcast, vsplat) 2018-04-20 19:38:37 +00:00
isel-bitcast-vsplat.ll [Hexagon] Improve HVX instruction selection (bitcast, vsplat) 2018-04-20 19:38:37 +00:00
isel-bool-vector.ll
isel-build-undef.ll [Hexagon] Simplify CFG after atomic expansion 2018-08-02 22:17:53 +00:00
isel-concat-multiple.ll [Hexagon] Simplify CFG after atomic expansion 2018-08-02 22:17:53 +00:00
isel-concat-vectors-bool.ll [Hexagon] Simplify CFG after atomic expansion 2018-08-02 22:17:53 +00:00
isel-concat-vectors.ll [Hexagon] Simplify CFG after atomic expansion 2018-08-02 22:17:53 +00:00
isel-const-splat-bitcast.ll [Hexagon] Simplify CFG after atomic expansion 2018-08-02 22:17:53 +00:00
isel-const-splat.ll
isel-const-vector.ll
isel-expand-unaligned-loads-noindexed.ll [Hexagon] Simplify CFG after atomic expansion 2018-08-02 22:17:53 +00:00
isel-expand-unaligned-loads.ll
isel-extractelt-illegal-type.ll [Hexagon] Use legal types when lowering CONCAT_VECTORS via BUILD_VECTOR 2018-04-19 17:11:58 +00:00
isel-qfalse.ll [Hexagon] Simplify CFG after atomic expansion 2018-08-02 22:17:53 +00:00
isel-select-const.ll [Hexagon] Simplify CFG after atomic expansion 2018-08-02 22:17:53 +00:00
isel-setcc-pair.ll [Hexagon] Simplify CFG after atomic expansion 2018-08-02 22:17:53 +00:00
isel-sext-inreg.ll [Hexagon] Simplify CFG after atomic expansion 2018-08-02 22:17:53 +00:00
isel-shift-byte.ll [Hexagon] Simplify CFG after atomic expansion 2018-08-02 22:17:53 +00:00
isel-shuffle-gather.ll [Hexagon] Use shuffles when lowering "gather" shufflevectors 2018-09-12 22:14:52 +00:00
isel-shuffle-pack.ll [Hexagon] Fix packing source vectors in shufflevector selection 2018-05-25 14:53:14 +00:00
isel-truncate.ll [Hexagon] Simplify CFG after atomic expansion 2018-08-02 22:17:53 +00:00
isel-vec-ext.ll [Hexagon] Simplify CFG after atomic expansion 2018-08-02 22:17:53 +00:00
isel-vsplat-pair.ll [Hexagon] Simplify CFG after atomic expansion 2018-08-02 22:17:53 +00:00
lower-insert-elt.ll
maximize-bandwidth.ll [Hexagon] Implement TTI::shouldMaximizeVectorBandwidth 2018-03-27 18:10:47 +00:00
perfect-single.ll
reg-sequence.ll
shift-64b.ll [Hexagon] Add patterns for vector shift-and-accumulate 2018-05-09 21:10:41 +00:00
shift-128b.ll [Hexagon] Add patterns for vector shift-and-accumulate 2018-05-09 21:10:41 +00:00
shuff-64b.ll
shuff-128b.ll
shuff-combos-64b.ll
shuff-combos-128b.ll
shuff-single.ll
vdd0.ll [Hexagon] Implement vector-pair zero as V6_vsubw_dv 2018-06-06 19:34:40 +00:00
vector-compare-64b.ll [Hexagon] Add patterns for accumulating HVX compares 2018-05-22 18:27:02 +00:00
vector-compare-128b.ll [Hexagon] Add patterns for accumulating HVX compares 2018-05-22 18:27:02 +00:00
vext-64b.ll
vext-128b.ll
vmux-order.ll