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mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-30 23:42:52 +01:00
llvm-mirror/test/MC
Kevin Enderby d64ba28e41 Fix ARM disassembly of VLD2 (single 2-element structure to all lanes)
instructions with writebacks. And add test a case for all opcodes handed by
DecodeVLD2DupInstruction() in ARMDisassembler.cpp .

llvm-svn: 154884
2012-04-17 00:49:27 +00:00
..
ARM ARM two-operand forms for vhadd and vhsub instructions. 2012-04-16 23:00:25 +00:00
AsmParser MC assembly parser handling for trailing comma in macro instantiation. 2012-04-16 21:18:49 +00:00
COFF Continue cleanup of LIT, getting rid of the remaining artifacts from dejagnu 2012-03-25 09:02:19 +00:00
Disassembler Fix ARM disassembly of VLD2 (single 2-element structure to all lanes) 2012-04-17 00:49:27 +00:00
ELF Continue cleanup of LIT, getting rid of the remaining artifacts from dejagnu 2012-03-25 09:02:19 +00:00
MachO Continue cleanup of LIT, getting rid of the remaining artifacts from dejagnu 2012-03-25 09:02:19 +00:00
MBlaze Continue cleanup of LIT, getting rid of the remaining artifacts from dejagnu 2012-03-25 09:02:19 +00:00
Mips This patch fixes 3 problems: 2012-04-16 18:20:26 +00:00
X86 Add retw and lretw instructions. Also, fix Intel syntax parsing for all 2012-04-11 01:10:53 +00:00