1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-23 13:02:52 +02:00
llvm-mirror/test/CodeGen/Hexagon/mpy.ll
Sirish Pande 7081e43d5c Enable all Hexagon tests.
llvm-svn: 156824
2012-05-15 16:13:12 +00:00

20 lines
599 B
LLVM

; RUN: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s
; CHECK: += mpyi
define void @foo(i32 %acc, i32 %num, i32 %num2) nounwind {
entry:
%acc.addr = alloca i32, align 4
%num.addr = alloca i32, align 4
%num2.addr = alloca i32, align 4
store i32 %acc, i32* %acc.addr, align 4
store i32 %num, i32* %num.addr, align 4
store i32 %num2, i32* %num2.addr, align 4
%0 = load i32* %num.addr, align 4
%1 = load i32* %acc.addr, align 4
%mul = mul nsw i32 %0, %1
%2 = load i32* %num2.addr, align 4
%add = add nsw i32 %mul, %2
store i32 %add, i32* %num.addr, align 4
ret void
}