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https://github.com/RPCS3/llvm-mirror.git
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2cf70e40fa
Both zext and sext are currently allowed during the search for narrow sequences and sexts operands are later added to the mac candidates. But operands of muls are also added, without checking whether they're sext or zext, which means we can generate a signed smlad when we shouldn't. Differential Revision: https://reviews.llvm.org/D54790 llvm-svn: 347542
174 lines
6.7 KiB
LLVM
174 lines
6.7 KiB
LLVM
; RUN: opt -mtriple=arm-arm-eabi -mcpu=cortex-m33 < %s -arm-parallel-dsp -S | FileCheck %s
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;
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; The Cortex-M0 does not support unaligned accesses:
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; RUN: opt -mtriple=arm-arm-eabi -mcpu=cortex-m0 < %s -arm-parallel-dsp -S | FileCheck %s --check-prefix=CHECK-UNSUPPORTED
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;
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; Check DSP extension:
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; RUN: opt -mtriple=arm-arm-eabi -mcpu=cortex-m33 -mattr=-dsp < %s -arm-parallel-dsp -S | FileCheck %s --check-prefix=CHECK-UNSUPPORTED
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define dso_local i64 @OneReduction(i32 %arg, i32* nocapture readnone %arg1, i16* nocapture readonly %arg2, i16* nocapture readonly %arg3) {
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;
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; CHECK-LABEL: @OneReduction
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; CHECK: %mac1{{\.}}026 = phi i64 [ [[V8:%[0-9]+]], %for.body ], [ 0, %for.body.preheader ]
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; CHECK: [[V4:%[0-9]+]] = bitcast i16* %arrayidx3 to i32*
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; CHECK: [[V5:%[0-9]+]] = load i32, i32* [[V4]], align 2
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; CHECK: [[V6:%[0-9]+]] = bitcast i16* %arrayidx to i32*
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; CHECK: [[V7:%[0-9]+]] = load i32, i32* [[V6]], align 2
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; CHECK: [[V8]] = call i64 @llvm.arm.smlald(i32 [[V5]], i32 [[V7]], i64 %mac1{{\.}}026)
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; CHECK-NOT: call i64 @llvm.arm.smlald
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;
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; CHECK-UNSUPPORTED-NOT: call i64 @llvm.arm.smlald
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;
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entry:
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%cmp24 = icmp sgt i32 %arg, 0
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br i1 %cmp24, label %for.body.preheader, label %for.cond.cleanup
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for.body.preheader:
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%.pre = load i16, i16* %arg3, align 2
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%.pre27 = load i16, i16* %arg2, align 2
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br label %for.body
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for.cond.cleanup:
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%mac1.0.lcssa = phi i64 [ 0, %entry ], [ %add11, %for.body ]
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ret i64 %mac1.0.lcssa
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for.body:
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; One reduction statement here:
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%mac1.026 = phi i64 [ %add11, %for.body ], [ 0, %for.body.preheader ]
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%i.025 = phi i32 [ %add, %for.body ], [ 0, %for.body.preheader ]
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%arrayidx = getelementptr inbounds i16, i16* %arg3, i32 %i.025
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%0 = load i16, i16* %arrayidx, align 2
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%add = add nuw nsw i32 %i.025, 1
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%arrayidx1 = getelementptr inbounds i16, i16* %arg3, i32 %add
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%1 = load i16, i16* %arrayidx1, align 2
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%arrayidx3 = getelementptr inbounds i16, i16* %arg2, i32 %i.025
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%2 = load i16, i16* %arrayidx3, align 2
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%conv = sext i16 %2 to i64
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%conv4 = sext i16 %0 to i64
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%mul = mul nsw i64 %conv, %conv4
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%arrayidx6 = getelementptr inbounds i16, i16* %arg2, i32 %add
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%3 = load i16, i16* %arrayidx6, align 2
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%conv7 = sext i16 %3 to i64
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%conv8 = sext i16 %1 to i64
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%mul9 = mul nsw i64 %conv7, %conv8
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%add10 = add i64 %mul, %mac1.026
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; Here the Mul is the LHS, and the Add the RHS.
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%add11 = add i64 %mul9, %add10
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%exitcond = icmp ne i32 %add, %arg
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br i1 %exitcond, label %for.body, label %for.cond.cleanup
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}
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define dso_local arm_aapcs_vfpcc i64 @TwoReductions(i32 %arg, i32* nocapture readnone %arg1, i16* nocapture readonly %arg2, i16* nocapture readonly %arg3) {
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;
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; CHECK-LABEL: @TwoReductions
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;
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; CHECK: %mac1{{\.}}058 = phi i64 [ [[V10:%[0-9]+]], %for.body ], [ 0, %for.body.preheader ]
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; CHECK: %mac2{{\.}}057 = phi i64 [ [[V17:%[0-9]+]], %for.body ], [ 0, %for.body.preheader ]
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; CHECK: [[V10]] = call i64 @llvm.arm.smlald(i32 %{{.*}}, i32 %{{.*}}, i64 %mac1{{\.}}058)
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; CHECK: [[V17]] = call i64 @llvm.arm.smlald(i32 %{{.*}}, i32 %{{.*}}, i64 %mac2{{\.}}057)
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; CHECK-NOT: call i64 @llvm.arm.smlald
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;
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entry:
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%cmp55 = icmp sgt i32 %arg, 0
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br i1 %cmp55, label %for.body.preheader, label %for.cond.cleanup
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for.cond.cleanup:
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%mac2.0.lcssa = phi i64 [ 0, %entry ], [ %add28, %for.body ]
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%mac1.0.lcssa = phi i64 [ 0, %entry ], [ %add16, %for.body ]
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%add30 = add nsw i64 %mac1.0.lcssa, %mac2.0.lcssa
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ret i64 %add30
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for.body.preheader:
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br label %for.body
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for.body:
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; And two reduction statements here:
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%mac1.058 = phi i64 [ %add16, %for.body ], [ 0, %for.body.preheader ]
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%mac2.057 = phi i64 [ %add28, %for.body ], [ 0, %for.body.preheader ]
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%i.056 = phi i32 [ %add29, %for.body ], [ 0, %for.body.preheader ]
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%arrayidx = getelementptr inbounds i16, i16* %arg3, i32 %i.056
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%0 = load i16, i16* %arrayidx, align 2
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%add1 = or i32 %i.056, 1
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%arrayidx2 = getelementptr inbounds i16, i16* %arg3, i32 %add1
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%1 = load i16, i16* %arrayidx2, align 2
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%add3 = or i32 %i.056, 2
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%arrayidx4 = getelementptr inbounds i16, i16* %arg3, i32 %add3
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%2 = load i16, i16* %arrayidx4, align 2
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%add5 = or i32 %i.056, 3
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%arrayidx6 = getelementptr inbounds i16, i16* %arg3, i32 %add5
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%3 = load i16, i16* %arrayidx6, align 2
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%arrayidx8 = getelementptr inbounds i16, i16* %arg2, i32 %i.056
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%4 = load i16, i16* %arrayidx8, align 2
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%conv = sext i16 %4 to i64
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%conv9 = sext i16 %0 to i64
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%mul = mul nsw i64 %conv, %conv9
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%arrayidx11 = getelementptr inbounds i16, i16* %arg2, i32 %add1
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%5 = load i16, i16* %arrayidx11, align 2
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%conv12 = sext i16 %5 to i64
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%conv13 = sext i16 %1 to i64
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%mul14 = mul nsw i64 %conv12, %conv13
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%add15 = add i64 %mul, %mac1.058
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%add16 = add i64 %add15, %mul14
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%arrayidx18 = getelementptr inbounds i16, i16* %arg2, i32 %add3
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%6 = load i16, i16* %arrayidx18, align 2
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%conv19 = sext i16 %6 to i64
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%conv20 = sext i16 %2 to i64
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%mul21 = mul nsw i64 %conv19, %conv20
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%arrayidx23 = getelementptr inbounds i16, i16* %arg2, i32 %add5
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%7 = load i16, i16* %arrayidx23, align 2
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%conv24 = sext i16 %7 to i64
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%conv25 = sext i16 %3 to i64
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%mul26 = mul nsw i64 %conv24, %conv25
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%add27 = add i64 %mul21, %mac2.057
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%add28 = add i64 %add27, %mul26
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%add29 = add nuw nsw i32 %i.056, 4
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%cmp = icmp slt i32 %add29, %arg
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br i1 %cmp, label %for.body, label %for.cond.cleanup
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}
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define i64 @reduction_zext(i32 %arg, i32* nocapture readnone %arg1, i16* nocapture readonly %arg2, i16* nocapture readonly %arg3) {
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; CHECK-LABEL: @reduction_zext
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; CHECK-NOT: call i64 @llvm.arm.smlald
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; CHECK-NOT: call i32 @llvm.arm.smlad
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entry:
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%cmp24 = icmp sgt i32 %arg, 0
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br i1 %cmp24, label %for.body.preheader, label %for.cond.cleanup
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for.body.preheader:
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%.pre = load i16, i16* %arg3, align 2
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%.pre27 = load i16, i16* %arg2, align 2
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br label %for.body
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for.cond.cleanup:
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%mac1.0.lcssa = phi i64 [ 0, %entry ], [ %add11, %for.body ]
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ret i64 %mac1.0.lcssa
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for.body:
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%mac1.026 = phi i64 [ %add11, %for.body ], [ 0, %for.body.preheader ]
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%i.025 = phi i32 [ %add, %for.body ], [ 0, %for.body.preheader ]
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%arrayidx = getelementptr inbounds i16, i16* %arg3, i32 %i.025
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%0 = load i16, i16* %arrayidx, align 2
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%add = add nuw nsw i32 %i.025, 1
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%arrayidx1 = getelementptr inbounds i16, i16* %arg3, i32 %add
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%1 = load i16, i16* %arrayidx1, align 2
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%arrayidx3 = getelementptr inbounds i16, i16* %arg2, i32 %i.025
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%2 = load i16, i16* %arrayidx3, align 2
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%conv = sext i16 %2 to i64
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%conv4 = zext i16 %0 to i64
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%mul = mul nsw i64 %conv, %conv4
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%arrayidx6 = getelementptr inbounds i16, i16* %arg2, i32 %add
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%3 = load i16, i16* %arrayidx6, align 2
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%conv7 = sext i16 %3 to i64
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%conv8 = zext i16 %1 to i64
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%mul9 = mul nsw i64 %conv7, %conv8
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%add10 = add i64 %mul, %mac1.026
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%add11 = add i64 %mul9, %add10
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%exitcond = icmp ne i32 %add, %arg
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br i1 %exitcond, label %for.body, label %for.cond.cleanup
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}
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